#ifndef _ECC_X3400_REG_H_
#define _ECC_X3400_REG_H_

#ifndef _SYS_BITOPS_H_
#include <sys/bitops.h>
#endif

#define PCIBUS_X3400UC                  0xff

#define PCISLOT_X3400UC_MC              3
#define PCIFUNC_X3400UC_MC              0
#define PCI_X3400UC_MC_VID_ID           0x8086
#define PCI_X3400UC_MC_DID_ID           0x2c98
#define PCI_X3400UC_MC_CTRL             0x48
#define PCI_X3400UC_MC_CTRL_ECCEN       __BIT(1)
#define PCI_X3400UC_MC_STS              0x4c
#define PCI_X3400UC_MC_STS_ECCEN        __BIT(4)
#define PCI_X3400UC_MC_MAX_DOD          0x64
#define PCI_X3400UC_MC_MAX_DOD_DIMMS    __BITS(0, 1)

#define PCISLOT_X3400UC_MCT2            3
#define PCIFUNC_X3400UC_MCT2            2
#define PCI_X3400UC_MCT2_VID_ID         0x8086
#define PCI_X3400UC_MCT2_DID_ID         0x2c9a
#define PCI_X3400UC_MCT2_COR_ECC_CNT_0  0x80
#define PCI_X3400UC_MCT2_COR_ECC_CNT_1  0x84
#define PCI_X3400UC_MCT2_COR_ECC_CNT_2  0x88
#define PCI_X3400UC_MCT2_COR_ECC_CNT_3  0x8c
#define PCI_X3400UC_MCT2_COR_DIMM0      __BITS(0, 14)
#define PCI_X3400UC_MCT2_COR_DIMM0_OV   __BIT(15)
#define PCI_X3400UC_MCT2_COR_DIMM1      __BITS(16, 30)
#define PCI_X3400UC_MCT2_COR_DIMM1_OV   __BIT(31)

#endif  /* !_ECC_X3400_REG_H_ */