#ifndef _SCSI_SCSI_DA_H
#define _SCSI_SCSI_DA_H 1
#include <sys/cdefs.h>
struct scsi_rezero_unit
{
u_int8_t opcode;
#define SRZU_LUN_MASK 0xE0
u_int8_t byte2;
u_int8_t reserved[3];
u_int8_t control;
};
struct scsi_format_unit
{
u_int8_t opcode;
u_int8_t byte2;
#define FU_FORMAT_MASK SRDD10_DLIST_FORMAT_MASK
#define FU_BLOCK_FORMAT SRDD10_BLOCK_FORMAT
#define FU_BFI_FORMAT SRDD10_BYTES_FROM_INDEX_FORMAT
#define FU_PHYS_FORMAT SRDD10_PHYSICAL_SECTOR_FORMAT
#define FU_CMPLST 0x08
#define FU_FMT_DATA 0x10
u_int8_t vendor_specific;
u_int8_t interleave[2];
u_int8_t control;
};
struct scsi_reassign_blocks
{
u_int8_t opcode;
u_int8_t byte2;
u_int8_t unused[3];
u_int8_t control;
};
struct scsi_read_defect_data_10
{
u_int8_t opcode;
#define SRDD10_LUN_MASK 0xE0
u_int8_t byte2;
#define SRDD10_GLIST 0x08
#define SRDD10_PLIST 0x10
#define SRDD10_DLIST_FORMAT_MASK 0x07
#define SRDD10_BLOCK_FORMAT 0x00
#define SRDD10_BYTES_FROM_INDEX_FORMAT 0x04
#define SRDD10_PHYSICAL_SECTOR_FORMAT 0x05
u_int8_t format;
u_int8_t reserved[4];
u_int8_t alloc_length[2];
u_int8_t control;
};
struct scsi_read_defect_data_12
{
u_int8_t opcode;
#define SRDD12_LUN_MASK 0xE0
u_int8_t byte2;
#define SRDD12_GLIST 0x08
#define SRDD12_PLIST 0x10
#define SRDD12_DLIST_FORMAT_MASK 0x07
#define SRDD12_BLOCK_FORMAT 0x00
#define SRDD12_BYTES_FROM_INDEX_FORMAT 0x04
#define SRDD12_PHYSICAL_SECTOR_FORMAT 0x05
u_int8_t format;
u_int8_t reserved[4];
u_int8_t alloc_length[4];
u_int8_t control;
};
#define REZERO_UNIT 0x01
#define FORMAT_UNIT 0x04
#define REASSIGN_BLOCKS 0x07
#define MODE_SELECT 0x15
#define MODE_SENSE 0x1a
#define READ_FORMAT_CAPACITIES 0x23
#define WRITE_AND_VERIFY 0x2e
#define VERIFY 0x2f
#define READ_DEFECT_DATA_10 0x37
#define READ_DEFECT_DATA_12 0xb7
struct format_defect_list_header
{
u_int8_t reserved;
u_int8_t byte2;
#define FU_DLH_VS 0x01
#define FU_DLH_IMMED 0x02
#define FU_DLH_DSP 0x04
#define FU_DLH_IP 0x08
#define FU_DLH_STPF 0x10
#define FU_DLH_DCRT 0x20
#define FU_DLH_DPRY 0x40
#define FU_DLH_FOV 0x80
u_int8_t defect_list_length[2];
};
struct format_ipat_descriptor
{
u_int8_t byte1;
#define FU_INIT_NO_HDR 0x00
#define FU_INIT_LBA_MSB 0x40
#define FU_INIT_LBA_EACH 0x80
#define FU_INIT_SI 0x20
u_int8_t pattern_type;
#define FU_INIT_PAT_DEFAULT 0x00
#define FU_INIT_PAT_REPEAT 0x01
u_int8_t pat_length[2];
};
struct scsi_read_format_capacities
{
uint8_t opcode;
uint8_t byte2;
#define SRFC_LUN_MASK 0xE0
uint8_t reserved0[5];
uint8_t alloc_length[2];
uint8_t reserved1[3];
};
struct scsi_verify
{
uint8_t opcode;
uint8_t byte2;
#define SVFY_LUN_MASK 0xE0
#define SVFY_RELADR 0x01
#define SVFY_BYTECHK 0x02
#define SVFY_DPO 0x10
uint8_t addr[4];
uint8_t reserved0[1];
uint8_t len[2];
uint8_t reserved1[3];
};
struct scsi_write_and_verify
{
uint8_t opcode;
uint8_t byte2;
#define SWVY_LUN_MASK 0xE0
#define SWVY_RELADR 0x01
#define SWVY_BYTECHK 0x02
#define SWVY_DPO 0x10
uint8_t addr[4];
uint8_t reserved0[1];
uint8_t len[2];
uint8_t reserved1[3];
};
struct format_capacity_list_header {
uint8_t unused[3];
uint8_t capacity_list_length;
};
struct format_capacity_descriptor {
uint8_t nblocks[4];
uint8_t byte4;
#define FCD_CODE_MASK 0x03
#define FCD_UNFORMATTED 0x01
#define FCD_FORMATTED 0x02
#define FCD_NOMEDIA 0x03
uint8_t block_length[3];
};
struct scsi_reassign_blocks_data
{
u_int8_t reserved[2];
u_int8_t length[2];
struct {
u_int8_t dlbaddr[4];
} defect_descriptor[1];
};
struct scsi_read_defect_data_hdr_10
{
u_int8_t reserved;
#define SRDDH10_GLIST 0x08
#define SRDDH10_PLIST 0x10
#define SRDDH10_DLIST_FORMAT_MASK 0x07
#define SRDDH10_BLOCK_FORMAT 0x00
#define SRDDH10_BYTES_FROM_INDEX_FORMAT 0x04
#define SRDDH10_PHYSICAL_SECTOR_FORMAT 0x05
u_int8_t format;
u_int8_t length[2];
};
struct scsi_defect_desc_block
{
u_int8_t address[4];
};
struct scsi_defect_desc_bytes_from_index
{
u_int8_t cylinder[3];
u_int8_t head;
u_int8_t bytes_from_index[4];
};
struct scsi_defect_desc_phys_sector
{
u_int8_t cylinder[3];
u_int8_t head;
u_int8_t sector[4];
};
struct scsi_read_defect_data_hdr_12
{
u_int8_t reserved;
#define SRDDH12_GLIST 0x08
#define SRDDH12_PLIST 0x10
#define SRDDH12_DLIST_FORMAT_MASK 0x07
#define SRDDH12_BLOCK_FORMAT 0x00
#define SRDDH12_BYTES_FROM_INDEX_FORMAT 0x04
#define SRDDH12_PHYSICAL_SECTOR_FORMAT 0x05
u_int8_t format;
u_int8_t length[4];
};
union disk_pages
{
struct format_device_page {
u_int8_t pg_code;
#define SMS_FORMAT_DEVICE_PAGE 0x03
u_int8_t pg_length;
#define SMS_FORMAT_DEVICE_PLEN 0x16
u_int8_t trk_z_1;
u_int8_t trk_z_0;
u_int8_t alt_sec_1;
u_int8_t alt_sec_0;
u_int8_t alt_trk_z_1;
u_int8_t alt_trk_z_0;
u_int8_t alt_trk_v_1;
u_int8_t alt_trk_v_0;
u_int8_t ph_sec_t_1;
u_int8_t ph_sec_t_0;
u_int8_t bytes_s_1;
u_int8_t bytes_s_0;
u_int8_t interleave_1;
u_int8_t interleave_0;
u_int8_t trk_skew_1;
u_int8_t trk_skew_0;
u_int8_t cyl_skew_1;
u_int8_t cyl_skew_0;
u_int8_t flags;
#define DISK_FMT_SURF 0x10
#define DISK_FMT_RMB 0x20
#define DISK_FMT_HSEC 0x40
#define DISK_FMT_SSEC 0x80
u_int8_t reserved21;
u_int8_t reserved22;
u_int8_t reserved23;
} format_device;
struct rigid_geometry_page {
u_int8_t pg_code;
#define SMS_RIGID_GEOMETRY_PAGE 0x04
u_int8_t pg_length;
#define SMS_RIGID_GEOMETRY_PLEN 0x16
u_int8_t ncyl_2;
u_int8_t ncyl_1;
u_int8_t ncyl_0;
u_int8_t nheads;
u_int8_t st_cyl_wp_2;
u_int8_t st_cyl_wp_1;
u_int8_t st_cyl_wp_0;
u_int8_t st_cyl_rwc_2;
u_int8_t st_cyl_rwc_1;
u_int8_t st_cyl_rwc_0;
u_int8_t driv_step_1;
u_int8_t driv_step_0;
u_int8_t land_zone_2;
u_int8_t land_zone_1;
u_int8_t land_zone_0;
u_int8_t rpl;
u_int8_t rot_offset;
u_int8_t reserved19;
u_int8_t medium_rot_rate_1;
u_int8_t medium_rot_rate_0;
u_int8_t reserved22;
u_int8_t reserved23;
} rigid_geometry;
struct flexible_disk_page {
u_int8_t pg_code;
#define SMS_FLEXIBLE_GEOMETRY_PAGE 0x05
u_int8_t pg_length;
#define SMS_FLEXIBLE_GEOMETRY_PLEN 0x1E
u_int8_t xfr_rate_1;
u_int8_t xfr_rate_0;
u_int8_t nheads;
u_int8_t sec_per_track;
u_int8_t bytes_s_1;
u_int8_t bytes_s_0;
u_int8_t ncyl_1;
u_int8_t ncyl_0;
u_int8_t st_cyl_wp_1;
u_int8_t st_cyl_wp_0;
u_int8_t st_cyl_rwc_1;
u_int8_t st_cyl_rwc_0;
u_int8_t driv_step_1;
u_int8_t driv_step_0;
u_int8_t driv_step_pw;
u_int8_t head_stl_del_1;
u_int8_t head_stl_del_0;
u_int8_t motor_on_del;
u_int8_t motor_off_del;
u_int8_t trdy_ssn_mo;
u_int8_t spc;
u_int8_t write_comp;
u_int8_t head_load_del;
u_int8_t head_uload_del;
u_int8_t pin32_pin2;
u_int8_t pin4_pint1;
u_int8_t medium_rot_rate_1;
u_int8_t medium_rot_rate_0;
u_int8_t reserved30;
u_int8_t reserved31;
} flexible_disk;
};
struct scsi_da_rw_recovery_page {
u_int8_t page_code;
#define SMS_RW_ERROR_RECOVERY_PAGE 0x01
u_int8_t page_length;
u_int8_t byte3;
#define SMS_RWER_AWRE 0x80
#define SMS_RWER_ARRE 0x40
#define SMS_RWER_TB 0x20
#define SMS_RWER_RC 0x10
#define SMS_RWER_EER 0x08
#define SMS_RWER_PER 0x04
#define SMS_RWER_DTE 0x02
#define SMS_RWER_DCR 0x01
u_int8_t read_retry_count;
u_int8_t correction_span;
u_int8_t head_offset_count;
u_int8_t data_strobe_offset_cnt;
u_int8_t reserved;
u_int8_t write_retry_count;
u_int8_t reserved2;
u_int8_t recovery_time_limit[2];
};
__BEGIN_DECLS
#ifndef _KERNEL
void scsi_format_unit(struct ccb_scsiio *csio, u_int32_t retries,
void (*cbfcnp)(struct cam_periph *, union ccb *),
u_int8_t tag_action, u_int8_t byte2, u_int16_t ileave,
u_int8_t *data_ptr, u_int32_t dxfer_len,
u_int8_t sense_len, u_int32_t timeout);
#endif
__END_DECLS
#endif