sys/dev/drm/amd/display/dc/dce/dce_abm.c

146

REG_GET_2(BL_PWM_PERIOD_CNTL,

sys/dev/drm/amd/display/dc/dce100/dce100_resource.c

397

REG_GET_2(CC_DC_HDMI_STRAPS,

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

761

REG_GET_2(LVTMA_PWRSEQ_CNTL, LVTMA_DIGON, &dig_on, LVTMA_DIGON_OVRD, &dig_on_ovrd);

sys/dev/drm/amd/display/dc/dce110/dce110_resource.c

408

REG_GET_2(CC_DC_HDMI_STRAPS,

sys/dev/drm/amd/display/dc/dce112/dce112_resource.c

416

REG_GET_2(CC_DC_HDMI_STRAPS,

sys/dev/drm/amd/display/dc/dce80/dce80_resource.c

429

REG_GET_2(CC_DC_HDMI_STRAPS,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

1002

REG_GET_2(DCN_TTU_QOS_WM,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

854

REG_GET_2(BLANK_OFFSET_0,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

864

REG_GET_2(DST_AFTER_SCALER,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

869

REG_GET_2(PREFETCH_SETTINS,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

873

REG_GET_2(PREFETCH_SETTINGS,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

877

REG_GET_2(VBLANK_PARAMETERS_0,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

905

REG_GET_2(PER_LINE_DELIVERY_PRE,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

909

REG_GET_2(PER_LINE_DELIVERY,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

941

REG_GET_2(DCN_TTU_QOS_WM,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

945

REG_GET_2(DCN_GLOBAL_TTU_CNTL,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

980

REG_GET_2(DCSURF_PRI_VIEWPORT_DIMENSION,

sys/dev/drm/amd/display/dc/dcn10/dcn10_hubp.c

984

REG_GET_2(DCSURF_SURFACE_CONFIG,

sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c

151

REG_GET_2(MPCC_STATUS[mpcc_id],

sys/dev/drm/amd/display/dc/dcn10/dcn10_mpc.c

427

REG_GET_2(MPCC_STATUS[mpcc_inst], MPCC_IDLE, &s->idle,

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1123

REG_GET_2(OTG_V_BLANK_START_END,

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1198

REG_GET_2(OTG_V_BLANK_START_END,

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1220

REG_GET_2(OTG_V_SYNC_A,

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1224

REG_GET_2(OTG_H_BLANK_START_END,

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1228

REG_GET_2(OTG_H_SYNC_A,

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1260

REG_GET_2(OTG_V_BLANK_START_END,

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1264

REG_GET_2(OTG_H_BLANK_START_END,

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

1365

REG_GET_2(OTG_CRC0_DATA_RG,

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

412

REG_GET_2(OTG_BLANK_CONTROL,

sys/dev/drm/amd/display/dc/dcn10/dcn10_optc.c

626

REG_GET_2(OTG_STATUS_POSITION,

sys/dev/drm/amd/display/dc/gpio/hw_ddc.c

108

reg2 = REG_GET_2(gpio.MASK_reg,