sys/dev/crypto/tpm/tpm20.h

181

WR1(sc, off, RD1(sc, off) | val);

sys/dev/crypto/tpm/tpm_tis.c

309

*buf++ = RD1(sc, TPM_DATA_FIFO);

sys/dev/crypto/tpm/tpm_tis.c

353

return ((RD1(sc, TPM_ACCESS) & mask) == mask);

sys/dev/crypto/tpm/tpm_tis.c

356

if ((RD1(sc, TPM_ACCESS) & mask) == mask)

sys/dev/disk/sdhci/sdhci.c

150

RD4(slot, SDHCI_PRESENT_STATE), RD1(slot, SDHCI_HOST_CONTROL));

sys/dev/disk/sdhci/sdhci.c

152

RD1(slot, SDHCI_POWER_CONTROL), RD1(slot, SDHCI_BLOCK_GAP_CONTROL));

sys/dev/disk/sdhci/sdhci.c

154

RD1(slot, SDHCI_WAKE_UP_CONTROL), RD2(slot, SDHCI_CLOCK_CONTROL));

sys/dev/disk/sdhci/sdhci.c

156

RD1(slot, SDHCI_TIMEOUT_CONTROL), RD4(slot, SDHCI_INT_STATUS));

sys/dev/disk/sdhci/sdhci.c

164

RD4(slot, SDHCI_MAX_CURRENT), RD1(slot, SDHCI_ADMA_ERR));

sys/dev/disk/sdhci/sdhci.c

1707

err = RD1(slot, SDHCI_ADMA_ERR);

sys/dev/disk/sdhci/sdhci.c

209

while ((RD1(slot, SDHCI_SOFTWARE_RESET) & mask) != mask) {

sys/dev/disk/sdhci/sdhci.c

220

while (RD1(slot, SDHCI_SOFTWARE_RESET) & mask) {