PORT_A
intel_bios_is_port_hpd_inverted(dev_priv, PORT_A))
#define _MIPI_PORT(port, a, c) (((port) == PORT_A) ? a : c) /* ports A and C only */
intel_display_power_get(dev_priv, port == PORT_A ?
if (WARN_ON(port == PORT_A))
if (WARN_ON(port == PORT_A))
if (port == PORT_A && is_dvi) {
if (is_dvi && (port == PORT_A || port == PORT_E))
for (port = PORT_A; port < I915_MAX_PORTS; port++)
for (port = PORT_A; port < I915_MAX_PORTS; port++) {
for (port = PORT_A; port < I915_MAX_PORTS; port++) {
info->supports_dvi = (port != PORT_A && port != PORT_E);
if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
if (port == PORT_A || port >= ARRAY_SIZE(port_mapping))
if (port == PORT_A)
if (port == PORT_A)
dev_priv->vbt.dsi.bl_ports = BIT(PORT_A);
dev_priv->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
dev_priv->vbt.dsi.cabc_ports = BIT(PORT_A);
BIT(PORT_A) | BIT(PORT_C);
if (port == PORT_A)
if (port == PORT_A) {
if (port == PORT_A && intel_dig_port->max_lanes == 4)
WARN_ON(is_mst && (port == PORT_A || port == PORT_E));
if (port != PORT_A || INTEL_GEN(dev_priv) >= 9)
if (port == PORT_A && INTEL_GEN(dev_priv) < 9)
[PORT_A] = TRANSCODER_EDP,
if (port == PORT_A)
if (dport->base.port != PORT_A)
if (port == PORT_A || port == PORT_E) {
if (I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES)
max_lanes = port == PORT_A ? 4 : 0;
case PORT_A:
if (port == PORT_A || port == PORT_E)
intel_dp_port_enabled(dev_priv, DP_A, PORT_A, &panel_pipe);
if (HAS_DDI(dev_priv) && I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_A_4_LANES)
intel_ddi_init(dev_priv, PORT_A);
intel_ddi_init(dev_priv, PORT_A);
found = I915_READ(DDI_BUF_CTL(PORT_A)) & DDI_INIT_DISPLAY_DETECTED;
intel_ddi_init(dev_priv, PORT_A);
intel_dp_init(dev_priv, DP_A, PORT_A);
case PORT_A:
if (encoder->port == PORT_A)
case PORT_A:
case PORT_A:
for_each_port_masked(port, BIT(PORT_A) | BIT(PORT_C)) {
if (port == PORT_A)
case PORT_A:
for ((__port) = PORT_A; (__port) < I915_MAX_PORTS; (__port)++) \
if (HAS_PCH_SPLIT(dev_priv) && !HAS_DDI(dev_priv) && port != PORT_A)
if (IS_G4X(dev_priv) || port == PORT_A)
if (IS_IVYBRIDGE(dev_priv) && port == PORT_A) {
} else if (HAS_PCH_CPT(dev_priv) && port != PORT_A) {
if (IS_IVYBRIDGE(dev_priv) && port == PORT_A)
else if (HAS_PCH_CPT(dev_priv) && port != PORT_A)
pipe_config->has_audio = tmp & DP_AUDIO_OUTPUT_ENABLE && port != PORT_A;
if (HAS_PCH_CPT(dev_priv) && port != PORT_A) {
if (port == PORT_A) {
if (port == PORT_A)
} else if ((IS_IVYBRIDGE(dev_priv) && port == PORT_A) ||
(HAS_PCH_CPT(dev_priv) && port != PORT_A)) {
if (port == PORT_A)
else if (IS_IVYBRIDGE(dev_priv) && port == PORT_A)
else if (HAS_PCH_CPT(dev_priv) && port != PORT_A)
} else if (IS_IVYBRIDGE(dev_priv) && port == PORT_A) {
} else if (IS_IVYBRIDGE(dev_priv) && port == PORT_A) {
} else if (IS_GEN6(dev_priv) && port == PORT_A) {
if (port == PORT_A)
if ((IS_IVYBRIDGE(dev_priv) && port == PORT_A) ||
(HAS_PCH_CPT(dev_priv) && port != PORT_A)) {
if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B && port != PORT_A) {
if (port == PORT_A || port == PORT_D)
if (INTEL_GEN(dev_priv) < 9 && port == PORT_A)
if (!IS_G4X(dev_priv) && port != PORT_A)
case PORT_A:
if (port != PORT_A)
[DPIO_CH0] = { .port = PORT_A },
[DPIO_CH0] = { .port = PORT_A },
case PORT_A:
return port ? PORT_C : PORT_A;
return PORT_A;
case PORT_A:
case PORT_A:
if (WARN_ON(port == PORT_A))
case PORT_A:
if (dig_port->base.port != PORT_A) {
cnl_set_procmon_ref_values(dev_priv, PORT_A);
for (port = PORT_A; port <= PORT_B; port++) {
for (port = PORT_A; port <= PORT_B; port++) {
*pipe = port == PORT_A ? PIPE_A : PIPE_B;
tmp = I915_READ(MIPI_CTRL(PORT_A));
I915_WRITE(MIPI_CTRL(PORT_A), tmp |
PORT_A ? PORT_C : PORT_A),
else if (port == PORT_A)
intel_dsi->ports = BIT(PORT_A) | BIT(PORT_C);
tmp = I915_READ(MIPI_CTRL(PORT_A));
I915_WRITE(MIPI_CTRL(PORT_A), tmp);
val = I915_READ(MIPI_CTRL(PORT_A));
I915_WRITE(MIPI_CTRL(PORT_A), val | GLK_MIPIIO_RESET_RELEASED);
val = I915_READ(MIPI_PORT_CTRL(PORT_A));
I915_WRITE(MIPI_PORT_CTRL(PORT_A), val | LP_OUTPUT_HOLD);
tmp = I915_READ(MIPI_CTRL(PORT_A));
I915_WRITE(MIPI_CTRL(PORT_A), tmp);
BXT_MIPI_PORT_CTRL(port) : MIPI_PORT_CTRL(PORT_A);
if ((IS_GEN9_LP(dev_priv) || port == PORT_A) &&
if (intel_dsi->ports == (BIT(PORT_A) | BIT(PORT_C))) {
if (intel_dsi->ports & (1 << PORT_A))