sys/dev/drm/amd/display/dc/core/dc_link_dp.c

168

union dpcd_training_lane dpcd_lane[LANE_COUNT_DP_MAX] = { { {0} } };

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2599

unsigned char link_qual_pattern[LANE_COUNT_DP_MAX] = {0};

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

2707

for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++)

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

432

union lane_adjust dpcd_lane_adjust[LANE_COUNT_DP_MAX] = { { {0} } };

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

507

union dpcd_training_lane dpcd_lane[LANE_COUNT_DP_MAX] = {{{0}}};

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

615

union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX];

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

729

union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = { { {0} } };

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

793

union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX];

sys/dev/drm/amd/display/dc/core/dc_link_dp.c

799

for (lane = 0; lane < LANE_COUNT_DP_MAX; lane++) {

sys/dev/drm/amd/display/dc/dc_dp_types.h

104

struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX];

sys/dev/drm/amd/display/include/link_service_types.h

73

struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX];