Symbol: pll_info
sys/dev/drm/amd/display/dc/bios/bios_parser.c
435
info->pll_info.crystal_frequency =
sys/dev/drm/amd/display/dc/bios/bios_parser.c
437
info->pll_info.min_input_pxl_clk_pll_frequency =
sys/dev/drm/amd/display/dc/bios/bios_parser.c
439
info->pll_info.max_input_pxl_clk_pll_frequency =
sys/dev/drm/amd/display/dc/bios/bios_parser.c
441
info->pll_info.min_output_pxl_clk_pll_frequency =
sys/dev/drm/amd/display/dc/bios/bios_parser.c
443
info->pll_info.max_output_pxl_clk_pll_frequency =
sys/dev/drm/amd/display/dc/bios/bios_parser.c
486
info->pll_info.crystal_frequency =
sys/dev/drm/amd/display/dc/bios/bios_parser.c
488
info->pll_info.min_input_pxl_clk_pll_frequency =
sys/dev/drm/amd/display/dc/bios/bios_parser.c
490
info->pll_info.max_input_pxl_clk_pll_frequency =
sys/dev/drm/amd/display/dc/bios/bios_parser.c
492
info->pll_info.min_output_pxl_clk_pll_frequency =
sys/dev/drm/amd/display/dc/bios/bios_parser.c
494
info->pll_info.max_output_pxl_clk_pll_frequency =
sys/dev/drm/amd/display/dc/bios/bios_parser.c
572
info->pll_info.crystal_frequency =
sys/dev/drm/amd/display/dc/bios/bios_parser.c
574
info->pll_info.min_input_pxl_clk_pll_frequency =
sys/dev/drm/amd/display/dc/bios/bios_parser.c
576
info->pll_info.max_input_pxl_clk_pll_frequency =
sys/dev/drm/amd/display/dc/bios/bios_parser.c
578
info->pll_info.min_output_pxl_clk_pll_frequency =
sys/dev/drm/amd/display/dc/bios/bios_parser.c
580
info->pll_info.max_output_pxl_clk_pll_frequency =
sys/dev/drm/amd/display/dc/bios/bios_parser2.c
1184
info->pll_info.crystal_frequency = dce_info->dce_refclk_10khz * 10;
sys/dev/drm/amd/display/dc/bios/bios_parser2.c
1187
if (info->pll_info.crystal_frequency == 0)
sys/dev/drm/amd/display/dc/bios/bios_parser2.c
1188
info->pll_info.crystal_frequency = 27000;
sys/dev/drm/amd/display/dc/bios/bios_parser2.c
1257
info->pll_info.crystal_frequency = dce_info->dce_refclk_10khz * 10;
sys/dev/drm/amd/display/dc/bios/bios_parser2.c
1259
if (info->pll_info.crystal_frequency == 0) {
sys/dev/drm/amd/display/dc/bios/bios_parser2.c
1261
info->pll_info.crystal_frequency = 27000;
sys/dev/drm/amd/display/dc/bios/bios_parser2.c
1263
info->pll_info.crystal_frequency = 100000;
sys/dev/drm/amd/display/dc/core/dc_resource.c
162
res_pool->ref_clock_inKhz = fw_info.pll_info.crystal_frequency;
sys/dev/drm/amd/display/dc/dce/dce_audio.c
755
const struct audio_pll_info *pll_info,
sys/dev/drm/amd/display/dc/dce/dce_audio.c
770
pll_info->dp_dto_source_clock_in_khz * 10;
sys/dev/drm/amd/display/dc/dce/dce_audio.c
777
const struct audio_pll_info *pll_info)
sys/dev/drm/amd/display/dc/dce/dce_audio.c
813
src_sel = pll_info->dto_source - DTO_SOURCE_ID0;
sys/dev/drm/amd/display/dc/dce/dce_audio.c
835
pll_info,
sys/dev/drm/amd/display/dc/dce/dce_audio.h
146
const struct audio_pll_info *pll_info);
sys/dev/drm/amd/display/dc/dce/dce_clock_source.c
1159
calc_pll_cs->ref_freq_khz = fw_info.pll_info.crystal_frequency;
sys/dev/drm/amd/display/dc/dce/dce_clock_source.c
1161
fw_info.pll_info.min_output_pxl_clk_pll_frequency;
sys/dev/drm/amd/display/dc/dce/dce_clock_source.c
1163
fw_info.pll_info.max_output_pxl_clk_pll_frequency;
sys/dev/drm/amd/display/dc/dce/dce_clock_source.c
1170
fw_info.pll_info.max_input_pxl_clk_pll_frequency;
sys/dev/drm/amd/display/dc/dce/dce_clock_source.c
1177
fw_info.pll_info.min_input_pxl_clk_pll_frequency;
sys/dev/drm/amd/display/dc/dce/dce_clock_source.c
1289
clk_src->ref_freq_khz = fw_info.pll_info.crystal_frequency;
sys/dev/drm/amd/display/dc/dce/dce_i2c_hw.c
108
return info.pll_info.crystal_frequency;
sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
1202
audio_output->pll_info.dp_dto_source_clock_in_khz =
sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
1207
audio_output->pll_info.feed_back_divider =
sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
1210
audio_output->pll_info.dto_source =
sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
1215
audio_output->pll_info.ss_enabled = true;
sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
1217
audio_output->pll_info.ss_percentage =
sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
1975
&audio_output.pll_info);
sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
2003
&audio_output.pll_info);
sys/dev/drm/amd/display/dc/i2caux/i2caux.c
337
return info.pll_info.crystal_frequency;
sys/dev/drm/amd/display/dc/inc/hw/audio.h
51
const struct audio_pll_info *pll_info);
sys/dev/drm/amd/display/include/audio_types.h
99
struct audio_pll_info pll_info;
sys/dev/drm/amd/display/include/grph_object_ctrl_defs.h
165
} pll_info;
sys/dev/drm/radeon/radeon_combios.c
728
uint16_t pll_info;
sys/dev/drm/radeon/radeon_combios.c
736
pll_info = combios_get_table_offset(dev, COMBIOS_PLL_INFO_TABLE);
sys/dev/drm/radeon/radeon_combios.c
737
if (pll_info) {
sys/dev/drm/radeon/radeon_combios.c
738
rev = RBIOS8(pll_info);
sys/dev/drm/radeon/radeon_combios.c
741
p1pll->reference_freq = RBIOS16(pll_info + 0xe);
sys/dev/drm/radeon/radeon_combios.c
742
p1pll->reference_div = RBIOS16(pll_info + 0x10);
sys/dev/drm/radeon/radeon_combios.c
743
p1pll->pll_out_min = RBIOS32(pll_info + 0x12);
sys/dev/drm/radeon/radeon_combios.c
744
p1pll->pll_out_max = RBIOS32(pll_info + 0x16);
sys/dev/drm/radeon/radeon_combios.c
749
p1pll->pll_in_min = RBIOS32(pll_info + 0x36);
sys/dev/drm/radeon/radeon_combios.c
750
p1pll->pll_in_max = RBIOS32(pll_info + 0x3a);
sys/dev/drm/radeon/radeon_combios.c
758
spll->reference_freq = RBIOS16(pll_info + 0x1a);
sys/dev/drm/radeon/radeon_combios.c
759
spll->reference_div = RBIOS16(pll_info + 0x1c);
sys/dev/drm/radeon/radeon_combios.c
760
spll->pll_out_min = RBIOS32(pll_info + 0x1e);
sys/dev/drm/radeon/radeon_combios.c
761
spll->pll_out_max = RBIOS32(pll_info + 0x22);
sys/dev/drm/radeon/radeon_combios.c
764
spll->pll_in_min = RBIOS32(pll_info + 0x48);
sys/dev/drm/radeon/radeon_combios.c
765
spll->pll_in_max = RBIOS32(pll_info + 0x4c);
sys/dev/drm/radeon/radeon_combios.c
773
mpll->reference_freq = RBIOS16(pll_info + 0x26);
sys/dev/drm/radeon/radeon_combios.c
774
mpll->reference_div = RBIOS16(pll_info + 0x28);
sys/dev/drm/radeon/radeon_combios.c
775
mpll->pll_out_min = RBIOS32(pll_info + 0x2a);
sys/dev/drm/radeon/radeon_combios.c
776
mpll->pll_out_max = RBIOS32(pll_info + 0x2e);
sys/dev/drm/radeon/radeon_combios.c
779
mpll->pll_in_min = RBIOS32(pll_info + 0x5a);
sys/dev/drm/radeon/radeon_combios.c
780
mpll->pll_in_max = RBIOS32(pll_info + 0x5e);
sys/dev/drm/radeon/radeon_combios.c
788
sclk = RBIOS16(pll_info + 0xa);
sys/dev/drm/radeon/radeon_combios.c
789
mclk = RBIOS16(pll_info + 0x8);
sys/dev/drm/radeon/radeon_combios.c
798
if (RBIOS32(pll_info + 0x16))
sys/dev/drm/radeon/radeon_combios.c
799
rdev->clock.max_pixel_clock = RBIOS32(pll_info + 0x16);