Symbol: mmCRTC_GSL_CONTROL
sys/dev/drm/amd/display/dc/dce100/dce100_hw_sequencer.c
45
.crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce100/dce100_hw_sequencer.c
48
.crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce100/dce100_hw_sequencer.c
51
.crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce100/dce100_hw_sequencer.c
54
.crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce100/dce100_hw_sequencer.c
57
.crtc = (mmCRTC4_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce100/dce100_hw_sequencer.c
60
.crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
87
.crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
90
.crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
93
.crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
96
.crtc = (mmCRTCV_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c
1296
address = CRTC_REG(mmCRTC_GSL_CONTROL);
sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c
1368
address = CRTC_REG(mmCRTC_GSL_CONTROL);
sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c
44
.crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c
47
.crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c
50
.crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c
53
.crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c
56
.crtc = (mmCRTC4_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c
59
.crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
46
.crtc = (mmCRTC0_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
49
.crtc = (mmCRTC1_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
52
.crtc = (mmCRTC2_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
55
.crtc = (mmCRTC3_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
58
.crtc = (mmCRTC4_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
sys/dev/drm/amd/display/dc/dce80/dce80_hw_sequencer.c
61
.crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),