sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1078

dividers->real_clock = le32_to_cpu(args.v4.ulClock);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1093

dividers->real_clock = le32_to_cpu(args.v6_out.ulClock.ulClock);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1546

le32_to_cpu(lut->ulVoltageId);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1550

voltage_table->mask_low = le32_to_cpu(gpio->ulGpioMaskVal);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1631

while ((le32_to_cpu(*(u32 *)reg_data) != END_OF_REG_DATA_BLOCK) &&

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1633

t_mem_id = (u8)((le32_to_cpu(*(u32 *)reg_data) & MEM_ID_MASK)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1637

(u32)((le32_to_cpu(*(u32 *)reg_data) & CLOCK_RANGE_MASK)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1642

(u32)le32_to_cpu(*((u32 *)reg_data + j));

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1654

if (le32_to_cpu(*(u32 *)reg_data) != END_OF_REG_DATA_BLOCK)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1773

dst_tmp[i] = le32_to_cpu(src_tmp[i]);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1795

le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware),

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

597

le32_to_cpu(firmware_info->info_12.ulMinPixelClockPLL_Output);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

599

le32_to_cpu(firmware_info->info.ulMaxPixelClockPLL_Output);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

639

le32_to_cpu(firmware_info->info.ulMaxEngineClockPLL_Output);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

666

le32_to_cpu(firmware_info->info.ulMaxMemoryClockPLL_Output);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

678

le32_to_cpu(firmware_info->info.ulDefaultEngineClock);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

680

le32_to_cpu(firmware_info->info.ulDefaultMemoryClock);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

692

le32_to_cpu(firmware_info->info_21.ulDefaultDispEngineClkFreq);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

932

(clock <= le32_to_cpu(ss_assign->v1.ulTargetClockRange))) {

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

950

(clock <= le32_to_cpu(ss_assign->v2.ulTargetClockRange))) {

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

972

(clock <= le32_to_cpu(ss_assign->v3.ulTargetClockRange))) {

sys/dev/drm/amd/amdgpu/amdgpu_atomfirmware.c

267

le32_to_cpu(firmware_info->v31.bootup_sclk_in10khz);

sys/dev/drm/amd/amdgpu/amdgpu_atomfirmware.c

269

le32_to_cpu(firmware_info->v31.bootup_mclk_in10khz);

sys/dev/drm/amd/amdgpu/amdgpu_atomfirmware.c

276

le32_to_cpu(firmware_info->v31.firmware_capability);

sys/dev/drm/amd/amdgpu/amdgpu_atomfirmware.c

290

spll->reference_freq = le32_to_cpu(smu_info->v31.core_refclk_10khz);

sys/dev/drm/amd/amdgpu/amdgpu_atomfirmware.c

313

mpll->reference_freq = le32_to_cpu(umc_info->v31.mem_refclk_10khz);

sys/dev/drm/amd/amdgpu/amdgpu_atomfirmware.c

45

if (le32_to_cpu(firmware_info->firmware_capability) &

sys/dev/drm/amd/amdgpu/amdgpu_atomfirmware.c

65

le32_to_cpu(firmware_info->bios_scratch_reg_startaddr);

sys/dev/drm/amd/amdgpu/amdgpu_atomfirmware.c

82

le32_to_cpu(firmware_usage->start_address_in_kb),

sys/dev/drm/amd/amdgpu/amdgpu_atomfirmware.c

86

start_addr = le32_to_cpu(firmware_usage->start_address_in_kb);

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

221

data_size = le32_to_cpu(header->header.ucode_size_bytes);

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

225

gpu_addr += ALIGN(le32_to_cpu(header->header.ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

226

data_size = le32_to_cpu(header->jt_size) << 2;

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

232

info->version = (uint16_t)le32_to_cpu(header->header.ucode_version);

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

235

info->image_size = le32_to_cpu(header->jt_offset) << 2;

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

238

info->feature_version = (uint16_t)le32_to_cpu(header->ucode_feature_version);

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

457

ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

463

adev->pm.fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

464

ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes);

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

465

ucode_start_address = le32_to_cpu(hdr->ucode_start_addr);

sys/dev/drm/amd/amdgpu/amdgpu_cgs.c

467

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1377

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1379

adev->gfx.config.max_shader_engines = le32_to_cpu(gpu_info_fw->gc_num_se);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1380

adev->gfx.config.max_cu_per_sh = le32_to_cpu(gpu_info_fw->gc_num_cu_per_sh);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1381

adev->gfx.config.max_sh_per_se = le32_to_cpu(gpu_info_fw->gc_num_sh_per_se);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1382

adev->gfx.config.max_backends_per_se = le32_to_cpu(gpu_info_fw->gc_num_rb_per_se);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1384

le32_to_cpu(gpu_info_fw->gc_num_tccs);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1385

adev->gfx.config.max_gprs = le32_to_cpu(gpu_info_fw->gc_num_gprs);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1386

adev->gfx.config.max_gs_threads = le32_to_cpu(gpu_info_fw->gc_num_max_gs_thds);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1387

adev->gfx.config.gs_vgt_table_depth = le32_to_cpu(gpu_info_fw->gc_gs_table_depth);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1388

adev->gfx.config.gs_prim_buffer_depth = le32_to_cpu(gpu_info_fw->gc_gsprim_buff_depth);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1390

le32_to_cpu(gpu_info_fw->gc_double_offchip_lds_buffer);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1391

adev->gfx.cu_info.wave_front_size = le32_to_cpu(gpu_info_fw->gc_wave_size);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1393

le32_to_cpu(gpu_info_fw->gc_max_waves_per_simd);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1395

le32_to_cpu(gpu_info_fw->gc_max_scratch_slots_per_cu);

sys/dev/drm/amd/amdgpu/amdgpu_device.c

1396

adev->gfx.cu_info.lds_size = le32_to_cpu(gpu_info_fw->gc_lds_size);

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

320

adev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps);

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

483

adev->pm.dpm.tdp_limit = le32_to_cpu(power_info->pplib5.ulTDPLimit);

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

484

adev->pm.dpm.near_tdp_limit = le32_to_cpu(power_info->pplib5.ulNearTDPLimit);

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

492

adev->pm.dpm.sq_ramping_threshold = le32_to_cpu(power_info->pplib5.ulSQRampingThreshold);

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

493

adev->pm.dpm.cac_leakage = le32_to_cpu(power_info->pplib5.ulCACLeakage);

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

520

le32_to_cpu(entry->ulLeakageValue);

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

676

le32_to_cpu(ppm->ulPlatformTDP);

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

678

le32_to_cpu(ppm->ulSmallACPlatformTDP);

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

680

le32_to_cpu(ppm->ulPlatformTDC);

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

682

le32_to_cpu(ppm->ulSmallACPlatformTDC);

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

684

le32_to_cpu(ppm->ulApuTDP);

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

686

le32_to_cpu(ppm->ulDGpuTDP);

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

688

le32_to_cpu(ppm->ulDGpuUlvPower);

sys/dev/drm/amd/amdgpu/amdgpu_dpm.c

690

le32_to_cpu(ppm->ulTjmax);

sys/dev/drm/amd/amdgpu/amdgpu_fence.c

118

seq = le32_to_cpu(*drv->cpu_addr);

sys/dev/drm/amd/amdgpu/amdgpu_fence.c

687

le32_to_cpu(*(ring->fence_drv.cpu_addr + 2)));

sys/dev/drm/amd/amdgpu/amdgpu_fence.c

690

le32_to_cpu(*(ring->fence_drv.cpu_addr + 4)));

sys/dev/drm/amd/amdgpu/amdgpu_fence.c

693

le32_to_cpu(*(ring->fence_drv.cpu_addr + 6)));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

100

DRM_DEBUG("jt_size: %u\n", le32_to_cpu(gfx_hdr->jt_size));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

119

le32_to_cpu(rlc_hdr->ucode_feature_version));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

121

le32_to_cpu(rlc_hdr->save_and_restore_offset));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

123

le32_to_cpu(rlc_hdr->clear_state_descriptor_offset));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

125

le32_to_cpu(rlc_hdr->avail_scratch_ram_locations));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

127

le32_to_cpu(rlc_hdr->master_pkt_description_offset));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

133

le32_to_cpu(rlc_hdr->ucode_feature_version));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

134

DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(rlc_hdr->jt_offset));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

135

DRM_DEBUG("jt_size: %u\n", le32_to_cpu(rlc_hdr->jt_size));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

137

le32_to_cpu(rlc_hdr->save_and_restore_offset));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

139

le32_to_cpu(rlc_hdr->clear_state_descriptor_offset));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

141

le32_to_cpu(rlc_hdr->avail_scratch_ram_locations));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

143

le32_to_cpu(rlc_hdr->reg_restore_list_size));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

145

le32_to_cpu(rlc_hdr->reg_list_format_start));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

147

le32_to_cpu(rlc_hdr->reg_list_format_separate_start));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

149

le32_to_cpu(rlc_hdr->starting_offsets_start));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

151

le32_to_cpu(rlc_hdr->reg_list_format_size_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

153

le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

155

le32_to_cpu(rlc_hdr->reg_list_size_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

157

le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

159

le32_to_cpu(rlc_hdr->reg_list_format_separate_size_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

161

le32_to_cpu(rlc_hdr->reg_list_format_separate_array_offset_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

163

le32_to_cpu(rlc_hdr->reg_list_separate_size_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

165

le32_to_cpu(rlc_hdr->reg_list_separate_array_offset_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

170

le32_to_cpu(v2_1->reg_list_format_direct_reg_list_length));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

172

le32_to_cpu(v2_1->save_restore_list_cntl_ucode_ver));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

174

le32_to_cpu(v2_1->save_restore_list_cntl_feature_ver));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

176

le32_to_cpu(v2_1->save_restore_list_cntl_size_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

178

le32_to_cpu(v2_1->save_restore_list_cntl_offset_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

180

le32_to_cpu(v2_1->save_restore_list_gpm_ucode_ver));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

182

le32_to_cpu(v2_1->save_restore_list_gpm_feature_ver));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

184

le32_to_cpu(v2_1->save_restore_list_gpm_size_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

186

le32_to_cpu(v2_1->save_restore_list_gpm_offset_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

188

le32_to_cpu(v2_1->save_restore_list_srm_ucode_ver));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

190

le32_to_cpu(v2_1->save_restore_list_srm_feature_ver));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

192

le32_to_cpu(v2_1->save_restore_list_srm_size_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

194

le32_to_cpu(v2_1->save_restore_list_srm_offset_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

214

le32_to_cpu(sdma_hdr->ucode_feature_version));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

216

le32_to_cpu(sdma_hdr->ucode_change_version));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

217

DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(sdma_hdr->jt_offset));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

218

DRM_DEBUG("jt_size: %u\n", le32_to_cpu(sdma_hdr->jt_size));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

222

DRM_DEBUG("digest_size: %u\n", le32_to_cpu(sdma_v1_1_hdr->digest_size));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

256

if (fw->datasize == le32_to_cpu(hdr->size_bytes))

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

33

DRM_DEBUG("size_bytes: %u\n", le32_to_cpu(hdr->size_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

34

DRM_DEBUG("header_size_bytes: %u\n", le32_to_cpu(hdr->header_size_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

347

ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes);

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

350

le32_to_cpu(header->ucode_array_offset_bytes)),

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

354

ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes) -

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

355

le32_to_cpu(cp_hdr->jt_size) * 4;

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

358

le32_to_cpu(header->ucode_array_offset_bytes)),

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

362

ucode->ucode_size = le32_to_cpu(cp_hdr->jt_size) * 4;

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

365

le32_to_cpu(header->ucode_array_offset_bytes) +

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

366

le32_to_cpu(cp_hdr->jt_offset) * 4),

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

369

ucode->ucode_size = le32_to_cpu(header->ucode_size_bytes) -

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

370

le32_to_cpu(dmcu_hdr->intv_size_bytes);

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

373

le32_to_cpu(header->ucode_array_offset_bytes)),

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

376

ucode->ucode_size = le32_to_cpu(dmcu_hdr->intv_size_bytes);

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

379

le32_to_cpu(header->ucode_array_offset_bytes) +

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

380

le32_to_cpu(dmcu_hdr->intv_offset_bytes)),

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

39

DRM_DEBUG("ucode_version: 0x%08x\n", le32_to_cpu(hdr->ucode_version));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

40

DRM_DEBUG("ucode_size_bytes: %u\n", le32_to_cpu(hdr->ucode_size_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

413

ALIGN(le32_to_cpu(comm_hdr->ucode_size_bytes),

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

416

le32_to_cpu(comm_hdr->ucode_array_offset_bytes) +

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

417

(le32_to_cpu(header->jt_offset) * 4);

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

418

memcpy(dst_addr, src_addr, le32_to_cpu(header->jt_size) * 4);

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

42

le32_to_cpu(hdr->ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

43

DRM_DEBUG("crc32: 0x%08x\n", le32_to_cpu(hdr->crc32));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

482

fw_offset += ALIGN(le32_to_cpu(cp_hdr->jt_size) << 2, PAGE_SIZE);

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

59

le32_to_cpu(mc_hdr->io_debug_size_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

61

le32_to_cpu(mc_hdr->io_debug_array_offset_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

79

DRM_DEBUG("ucode_start_addr: %u\n", le32_to_cpu(smc_hdr->ucode_start_addr));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

98

le32_to_cpu(gfx_hdr->ucode_feature_version));

sys/dev/drm/amd/amdgpu/amdgpu_ucode.c

99

DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset));

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

208

family_id = le32_to_cpu(hdr->ucode_version) & 0xff;

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

213

version_major = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xff;

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

214

version_minor = (le32_to_cpu(hdr->ucode_version) >> 8) & 0xff;

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

239

dec_minor = (le32_to_cpu(hdr->ucode_version) >> 8) & 0xff;

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

240

enc_minor = (le32_to_cpu(hdr->ucode_version) >> 24) & 0x3f;

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

241

enc_major = (le32_to_cpu(hdr->ucode_version) >> 30) & 0x3;

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

247

adev->uvd.fw_version = le32_to_cpu(hdr->ucode_version);

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

253

bo_size += AMDGPU_GPU_PAGE_ALIGN(le32_to_cpu(hdr->ucode_size_bytes) + 8);

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

405

offset = le32_to_cpu(hdr->ucode_array_offset_bytes);

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

407

le32_to_cpu(hdr->ucode_size_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

408

size -= le32_to_cpu(hdr->ucode_size_bytes);

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

409

ptr += le32_to_cpu(hdr->ucode_size_bytes);

sys/dev/drm/amd/amdgpu/amdgpu_uvd.c

670

num_dpb_buffer = (le32_to_cpu(msg[59]) & 0xff) + 2;

sys/dev/drm/amd/amdgpu/amdgpu_uvd.h

37

(AMDGPU_GPU_PAGE_ALIGN(le32_to_cpu(((const struct common_firmware_header *)(adev)->uvd.fw->data)->ucode_size_bytes) + \

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

172

ucode_version = le32_to_cpu(hdr->ucode_version);

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

307

offset = le32_to_cpu(hdr->ucode_array_offset_bytes);

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

103

fw_check = (le32_to_cpu(hdr->ucode_version) >> 20) & 0xf;

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

107

fw_rev = le32_to_cpu(hdr->ucode_version) & 0xfff;

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

108

enc_minor = (le32_to_cpu(hdr->ucode_version) >> 12) & 0xff;

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

110

dec_ver = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xf;

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

111

vep = (le32_to_cpu(hdr->ucode_version) >> 28) & 0xf;

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

117

family_id = le32_to_cpu(hdr->ucode_version) & 0xff;

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

118

version_major = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xff;

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

119

version_minor = (le32_to_cpu(hdr->ucode_version) >> 8) & 0xff;

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

126

bo_size += AMDGPU_GPU_PAGE_ALIGN(le32_to_cpu(hdr->ucode_size_bytes) + 8);

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

203

offset = le32_to_cpu(hdr->ucode_array_offset_bytes);

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

205

le32_to_cpu(hdr->ucode_size_bytes));

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

206

size -= le32_to_cpu(hdr->ucode_size_bytes);

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

207

ptr += le32_to_cpu(hdr->ucode_size_bytes);

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

95

adev->vcn.fw_version = le32_to_cpu(hdr->ucode_version);

sys/dev/drm/amd/amdgpu/atombios_crtc.c

433

adjusted_clock = le32_to_cpu(args.v3.sOutput.ulDispPllFreq) * 10;

sys/dev/drm/amd/amdgpu/atombios_crtc.c

549

ret_freq = le32_to_cpu(args.v2_1.asParam.ulDCEClkFreq) * 10;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5561

rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5566

rps->vclk = le32_to_cpu(non_clock_info->ulVCLK);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5567

rps->dclk = le32_to_cpu(non_clock_info->ulDCLK);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5759

boot_state->sclk_bootup_value = le32_to_cpu(firmware_info->ulDefaultEngineClock);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5760

boot_state->mclk_bootup_value = le32_to_cpu(firmware_info->ulDefaultMemoryClock);

sys/dev/drm/amd/amdgpu/ci_smc.c

223

adev->pm.fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/ci_smc.c

224

ucode_start_address = le32_to_cpu(hdr->ucode_start_addr);

sys/dev/drm/amd/amdgpu/ci_smc.c

225

ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes);

sys/dev/drm/amd/amdgpu/ci_smc.c

227

(adev->pm.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/cik_ih.c

190

wptr = le32_to_cpu(adev->wb.wb[adev->irq.ih.wptr_offs]);

sys/dev/drm/amd/amdgpu/cik_ih.c

243

switch (le32_to_cpu(adev->irq.ih.ring[ring_index]) & 0xff) {

sys/dev/drm/amd/amdgpu/cik_ih.c

246

pasid = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]) >> 16;

sys/dev/drm/amd/amdgpu/cik_ih.c

274

dw[0] = le32_to_cpu(adev->irq.ih.ring[ring_index + 0]);

sys/dev/drm/amd/amdgpu/cik_ih.c

275

dw[1] = le32_to_cpu(adev->irq.ih.ring[ring_index + 1]);

sys/dev/drm/amd/amdgpu/cik_ih.c

276

dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]);

sys/dev/drm/amd/amdgpu/cik_ih.c

277

dw[3] = le32_to_cpu(adev->irq.ih.ring[ring_index + 3]);

sys/dev/drm/amd/amdgpu/cik_sdma.c

554

fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/amd/amdgpu/cik_sdma.c

555

adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/cik_sdma.c

556

adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/cik_sdma.c

560

(adev->sdma.instance[i].fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/cik_sdma.c

644

tmp = le32_to_cpu(adev->wb.wb[index]);

sys/dev/drm/amd/amdgpu/cik_sdma.c

716

tmp = le32_to_cpu(adev->wb.wb[index]);

sys/dev/drm/amd/amdgpu/cz_ih.c

192

wptr = le32_to_cpu(adev->wb.wb[adev->irq.ih.wptr_offs]);

sys/dev/drm/amd/amdgpu/cz_ih.c

222

switch (le32_to_cpu(adev->irq.ih.ring[ring_index]) & 0xff) {

sys/dev/drm/amd/amdgpu/cz_ih.c

225

pasid = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]) >> 16;

sys/dev/drm/amd/amdgpu/cz_ih.c

253

dw[0] = le32_to_cpu(adev->irq.ih.ring[ring_index + 0]);

sys/dev/drm/amd/amdgpu/cz_ih.c

254

dw[1] = le32_to_cpu(adev->irq.ih.ring[ring_index + 1]);

sys/dev/drm/amd/amdgpu/cz_ih.c

255

dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]);

sys/dev/drm/amd/amdgpu/cz_ih.c

256

dw[3] = le32_to_cpu(adev->irq.ih.ring[ring_index + 3]);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2437

adev->gfx.pfp_fw_version = le32_to_cpu(pfp_hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2438

adev->gfx.ce_fw_version = le32_to_cpu(ce_hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2439

adev->gfx.me_fw_version = le32_to_cpu(me_hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2440

adev->gfx.me_feature_version = le32_to_cpu(me_hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2441

adev->gfx.ce_feature_version = le32_to_cpu(ce_hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2442

adev->gfx.pfp_feature_version = le32_to_cpu(pfp_hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2449

le32_to_cpu(pfp_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2450

fw_size = le32_to_cpu(pfp_hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2459

le32_to_cpu(ce_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2460

fw_size = le32_to_cpu(ce_hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2469

le32_to_cpu(me_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2470

fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2702

adev->gfx.mec_fw_version = le32_to_cpu(mec_hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2703

adev->gfx.mec_feature_version = le32_to_cpu(

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2711

le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2712

fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2726

adev->gfx.mec2_fw_version = le32_to_cpu(mec2_hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2727

adev->gfx.mec2_feature_version = le32_to_cpu(

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2733

le32_to_cpu(mec2_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2734

fw_size = le32_to_cpu(mec2_hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3545

adev->gfx.rlc_fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3546

adev->gfx.rlc_feature_version = le32_to_cpu(

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3573

(adev->gfx.rlc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3574

fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3810

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3811

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3812

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3818

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3819

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3820

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3826

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3827

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3828

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3834

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3835

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3836

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3842

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3843

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3844

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3849

cpu_to_le32(le32_to_cpu(fw_data[table_offset + i]));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1023

adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1024

adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1043

adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1045

adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1064

adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1065

adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1084

adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1085

adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1088

le32_to_cpu(rlc_hdr->save_and_restore_offset);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1090

le32_to_cpu(rlc_hdr->clear_state_descriptor_offset);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1092

le32_to_cpu(rlc_hdr->avail_scratch_ram_locations);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1094

le32_to_cpu(rlc_hdr->reg_restore_list_size);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1096

le32_to_cpu(rlc_hdr->reg_list_format_start);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1098

le32_to_cpu(rlc_hdr->reg_list_format_separate_start);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1100

le32_to_cpu(rlc_hdr->starting_offsets_start);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1102

le32_to_cpu(rlc_hdr->reg_list_format_size_bytes);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1104

le32_to_cpu(rlc_hdr->reg_list_size_bytes);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1116

le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1118

adev->gfx.rlc.register_list_format[i] = le32_to_cpu(tmp[i]);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1123

le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1125

adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1144

adev->gfx.mec_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1145

adev->gfx.mec_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1167

le32_to_cpu(cp_hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1169

le32_to_cpu(cp_hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1181

ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1188

ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1195

ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1202

ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1209

ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1214

ALIGN(le32_to_cpu(cp_hdr->jt_size) << 2, PAGE_SIZE);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1221

ALIGN(le32_to_cpu(64 * PAGE_SIZE), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1230

ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1320

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1321

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1322

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1328

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1329

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1330

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1336

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1337

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1338

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1344

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1345

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1346

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1352

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1353

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1354

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

1359

cpu_to_le32(le32_to_cpu(fw_data[table_offset + i]));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1084

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1085

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1086

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1092

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1093

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1094

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1100

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1101

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1102

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1108

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1109

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1110

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1116

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1117

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1118

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1123

cpu_to_le32(le32_to_cpu(fw_data[table_offset + i]));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1286

le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1287

fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2482

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2483

fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2575

le32_to_cpu(pfp_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2576

fw_size = le32_to_cpu(pfp_hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2585

le32_to_cpu(ce_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2586

fw_size = le32_to_cpu(ce_hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2595

le32_to_cpu(me_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2596

fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2770

le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

521

adev->gfx.rlc_srlc_fw_version = le32_to_cpu(rlc_hdr->save_restore_list_cntl_ucode_ver);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

522

adev->gfx.rlc_srlc_feature_version = le32_to_cpu(rlc_hdr->save_restore_list_cntl_feature_ver);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

523

adev->gfx.rlc.save_restore_list_cntl_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_cntl_size_bytes);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

524

adev->gfx.rlc.save_restore_list_cntl = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_cntl_offset_bytes);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

525

adev->gfx.rlc_srlg_fw_version = le32_to_cpu(rlc_hdr->save_restore_list_gpm_ucode_ver);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

526

adev->gfx.rlc_srlg_feature_version = le32_to_cpu(rlc_hdr->save_restore_list_gpm_feature_ver);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

527

adev->gfx.rlc.save_restore_list_gpm_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_gpm_size_bytes);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

528

adev->gfx.rlc.save_restore_list_gpm = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_gpm_offset_bytes);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

529

adev->gfx.rlc_srls_fw_version = le32_to_cpu(rlc_hdr->save_restore_list_srm_ucode_ver);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

530

adev->gfx.rlc_srls_feature_version = le32_to_cpu(rlc_hdr->save_restore_list_srm_feature_ver);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

531

adev->gfx.rlc.save_restore_list_srm_size_bytes = le32_to_cpu(rlc_hdr->save_restore_list_srm_size_bytes);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

532

adev->gfx.rlc.save_restore_list_srm = (u8 *)rlc_hdr + le32_to_cpu(rlc_hdr->save_restore_list_srm_offset_bytes);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

534

le32_to_cpu(rlc_hdr->reg_list_format_direct_reg_list_length);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

638

adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

639

adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

649

adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

650

adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

660

adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

661

adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

675

adev->gfx.rlc_fw_version = le32_to_cpu(rlc_hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

676

adev->gfx.rlc_feature_version = le32_to_cpu(rlc_hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

678

le32_to_cpu(rlc_hdr->save_and_restore_offset);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

680

le32_to_cpu(rlc_hdr->clear_state_descriptor_offset);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

682

le32_to_cpu(rlc_hdr->avail_scratch_ram_locations);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

684

le32_to_cpu(rlc_hdr->reg_restore_list_size);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

686

le32_to_cpu(rlc_hdr->reg_list_format_start);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

688

le32_to_cpu(rlc_hdr->reg_list_format_separate_start);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

690

le32_to_cpu(rlc_hdr->starting_offsets_start);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

692

le32_to_cpu(rlc_hdr->reg_list_format_size_bytes);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

694

le32_to_cpu(rlc_hdr->reg_list_size_bytes);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

704

le32_to_cpu(rlc_hdr->reg_list_format_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

706

adev->gfx.rlc.register_list_format[i] = le32_to_cpu(tmp[i]);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

711

le32_to_cpu(rlc_hdr->reg_list_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

713

adev->gfx.rlc.register_restore[i] = le32_to_cpu(tmp[i]);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

726

adev->gfx.mec_fw_version = le32_to_cpu(cp_hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

727

adev->gfx.mec_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

739

le32_to_cpu(cp_hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

741

le32_to_cpu(cp_hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

753

ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

760

ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

767

ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

774

ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

805

ALIGN(le32_to_cpu(header->ucode_size_bytes) - le32_to_cpu(cp_hdr->jt_size) * 4, PAGE_SIZE);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

811

ALIGN(le32_to_cpu(cp_hdr->jt_size) * 4, PAGE_SIZE);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

820

ALIGN(le32_to_cpu(header->ucode_size_bytes) - le32_to_cpu(cp_hdr->jt_size) * 4, PAGE_SIZE);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

825

ALIGN(le32_to_cpu(cp_hdr->jt_size) * 4, PAGE_SIZE);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

192

adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

193

regs_size = le32_to_cpu(hdr->io_debug_size_bytes) / (4 * 2);

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

195

(adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

196

ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/amd/amdgpu/gmc_v7_0.c

198

(adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

317

adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

318

regs_size = le32_to_cpu(hdr->io_debug_size_bytes) / (4 * 2);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

320

(adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

321

ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

323

(adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

386

adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

387

regs_size = le32_to_cpu(hdr->io_debug_size_bytes) / (4 * 2);

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

389

(adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes));

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

390

ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/amd/amdgpu/gmc_v8_0.c

392

(adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/iceland_ih.c

192

wptr = le32_to_cpu(adev->wb.wb[adev->irq.ih.wptr_offs]);

sys/dev/drm/amd/amdgpu/iceland_ih.c

222

switch (le32_to_cpu(adev->irq.ih.ring[ring_index]) & 0xff) {

sys/dev/drm/amd/amdgpu/iceland_ih.c

225

pasid = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]) >> 16;

sys/dev/drm/amd/amdgpu/iceland_ih.c

253

dw[0] = le32_to_cpu(adev->irq.ih.ring[ring_index + 0]);

sys/dev/drm/amd/amdgpu/iceland_ih.c

254

dw[1] = le32_to_cpu(adev->irq.ih.ring[ring_index + 1]);

sys/dev/drm/amd/amdgpu/iceland_ih.c

255

dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]);

sys/dev/drm/amd/amdgpu/iceland_ih.c

256

dw[3] = le32_to_cpu(adev->irq.ih.ring[ring_index + 3]);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2578

pi->sys_info.bootup_sclk = le32_to_cpu(igp_info->info_8.ulBootUpEngineClock);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2579

pi->sys_info.bootup_uma_clk = le32_to_cpu(igp_info->info_8.ulBootUpUMAClock);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2594

if (le32_to_cpu(igp_info->info_8.ulSystemConfig) & (1 << 3))

sys/dev/drm/amd/amdgpu/kv_dpm.c

2601

le32_to_cpu(igp_info->info_8.ulNbpStateMemclkFreq[i]);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2603

le32_to_cpu(igp_info->info_8.ulNbpStateNClkFreq[i]);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2605

if (le32_to_cpu(igp_info->info_8.ulGPUCapInfo) &

sys/dev/drm/amd/amdgpu/kv_dpm.c

2660

rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2665

rps->vclk = le32_to_cpu(non_clock_info->ulVCLK);

sys/dev/drm/amd/amdgpu/kv_dpm.c

2666

rps->dclk = le32_to_cpu(non_clock_info->ulDCLK);

sys/dev/drm/amd/amdgpu/psp_v10_0.c

140

adev->psp.asd_fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/psp_v10_0.c

141

adev->psp.asd_feature_version = le32_to_cpu(hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/psp_v10_0.c

142

adev->psp.asd_ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes);

sys/dev/drm/amd/amdgpu/psp_v10_0.c

144

le32_to_cpu(hdr->header.ucode_array_offset_bytes);

sys/dev/drm/amd/amdgpu/psp_v11_0.c

123

adev->psp.sos_fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/psp_v11_0.c

124

adev->psp.sos_feature_version = le32_to_cpu(hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/psp_v11_0.c

125

adev->psp.sos_bin_size = le32_to_cpu(hdr->sos_size_bytes);

sys/dev/drm/amd/amdgpu/psp_v11_0.c

126

adev->psp.sys_bin_size = le32_to_cpu(hdr->header.ucode_size_bytes) -

sys/dev/drm/amd/amdgpu/psp_v11_0.c

127

le32_to_cpu(hdr->sos_size_bytes);

sys/dev/drm/amd/amdgpu/psp_v11_0.c

129

le32_to_cpu(hdr->header.ucode_array_offset_bytes);

sys/dev/drm/amd/amdgpu/psp_v11_0.c

131

le32_to_cpu(hdr->sos_offset_bytes);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

131

adev->psp.sos_fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

132

adev->psp.sos_feature_version = le32_to_cpu(hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

133

adev->psp.sos_bin_size = le32_to_cpu(hdr->sos_size_bytes);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

134

adev->psp.sys_bin_size = le32_to_cpu(hdr->header.ucode_size_bytes) -

sys/dev/drm/amd/amdgpu/psp_v3_1.c

135

le32_to_cpu(hdr->sos_size_bytes);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

137

le32_to_cpu(hdr->header.ucode_array_offset_bytes);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

139

le32_to_cpu(hdr->sos_offset_bytes);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

151

adev->psp.asd_fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

152

adev->psp.asd_feature_version = le32_to_cpu(hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

153

adev->psp.asd_ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes);

sys/dev/drm/amd/amdgpu/psp_v3_1.c

155

le32_to_cpu(hdr->header.ucode_array_offset_bytes);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

158

adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

159

adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

169

ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

578

tmp = le32_to_cpu(adev->wb.wb[index]);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

654

tmp = le32_to_cpu(adev->wb.wb[index]);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

316

adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

317

adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

326

ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

850

tmp = le32_to_cpu(adev->wb.wb[index]);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

926

tmp = le32_to_cpu(adev->wb.wb[index]);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1022

tmp = le32_to_cpu(adev->wb.wb[index]);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1098

tmp = le32_to_cpu(adev->wb.wb[index]);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

309

adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

310

adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

322

ALIGN(le32_to_cpu(header->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

920

fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

924

le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/amd/amdgpu/si_dpm.c

7108

rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings);

sys/dev/drm/amd/amdgpu/si_dpm.c

7113

rps->vclk = le32_to_cpu(non_clock_info->ulVCLK);

sys/dev/drm/amd/amdgpu/si_dpm.c

7114

rps->dclk = le32_to_cpu(non_clock_info->ulDCLK);

sys/dev/drm/amd/amdgpu/si_dpm.c

7150

pl->flags = le32_to_cpu(clock_info->si.ulFlags);

sys/dev/drm/amd/amdgpu/tonga_ih.c

201

wptr = le32_to_cpu(adev->irq.ih.ring[adev->irq.ih.wptr_offs]);

sys/dev/drm/amd/amdgpu/tonga_ih.c

203

wptr = le32_to_cpu(adev->wb.wb[adev->irq.ih.wptr_offs]);

sys/dev/drm/amd/amdgpu/tonga_ih.c

233

switch (le32_to_cpu(adev->irq.ih.ring[ring_index]) & 0xff) {

sys/dev/drm/amd/amdgpu/tonga_ih.c

236

pasid = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]) >> 16;

sys/dev/drm/amd/amdgpu/tonga_ih.c

264

dw[0] = le32_to_cpu(adev->irq.ih.ring[ring_index + 0]);

sys/dev/drm/amd/amdgpu/tonga_ih.c

265

dw[1] = le32_to_cpu(adev->irq.ih.ring[ring_index + 1]);

sys/dev/drm/amd/amdgpu/tonga_ih.c

266

dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]);

sys/dev/drm/amd/amdgpu/tonga_ih.c

267

dw[3] = le32_to_cpu(adev->irq.ih.ring[ring_index + 3]);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

439

ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

445

ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

450

ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

115

ALIGN(le32_to_cpu(hdr->ucode_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/amdgpu/vega10_ih.c

199

wptr = le32_to_cpu(adev->irq.ih.ring[adev->irq.ih.wptr_offs]);

sys/dev/drm/amd/amdgpu/vega10_ih.c

201

wptr = le32_to_cpu(adev->wb.wb[adev->irq.ih.wptr_offs]);

sys/dev/drm/amd/amdgpu/vega10_ih.c

238

dw0 = le32_to_cpu(adev->irq.ih.ring[ring_index + 0]);

sys/dev/drm/amd/amdgpu/vega10_ih.c

239

dw3 = le32_to_cpu(adev->irq.ih.ring[ring_index + 3]);

sys/dev/drm/amd/amdgpu/vega10_ih.c

240

dw4 = le32_to_cpu(adev->irq.ih.ring[ring_index + 4]);

sys/dev/drm/amd/amdgpu/vega10_ih.c

241

dw5 = le32_to_cpu(adev->irq.ih.ring[ring_index + 5]);

sys/dev/drm/amd/amdgpu/vega10_ih.c

327

dw[0] = le32_to_cpu(adev->irq.ih.ring[ring_index + 0]);

sys/dev/drm/amd/amdgpu/vega10_ih.c

328

dw[1] = le32_to_cpu(adev->irq.ih.ring[ring_index + 1]);

sys/dev/drm/amd/amdgpu/vega10_ih.c

329

dw[2] = le32_to_cpu(adev->irq.ih.ring[ring_index + 2]);

sys/dev/drm/amd/amdgpu/vega10_ih.c

330

dw[3] = le32_to_cpu(adev->irq.ih.ring[ring_index + 3]);

sys/dev/drm/amd/amdgpu/vega10_ih.c

331

dw[4] = le32_to_cpu(adev->irq.ih.ring[ring_index + 4]);

sys/dev/drm/amd/amdgpu/vega10_ih.c

332

dw[5] = le32_to_cpu(adev->irq.ih.ring[ring_index + 5]);

sys/dev/drm/amd/amdgpu/vega10_ih.c

333

dw[6] = le32_to_cpu(adev->irq.ih.ring[ring_index + 6]);

sys/dev/drm/amd/amdgpu/vega10_ih.c

334

dw[7] = le32_to_cpu(adev->irq.ih.ring[ring_index + 7]);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

578

ALIGN(le32_to_cpu(hdr->header.ucode_size_bytes) - le32_to_cpu(hdr->intv_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

583

ALIGN(le32_to_cpu(hdr->intv_size_bytes), PAGE_SIZE);

sys/dev/drm/amd/display/amdgpu_dm/amdgpu_dm.c

585

adev->dm.dmcu_fw_version = le32_to_cpu(hdr->header.ucode_version);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

1069

le32_to_cpu(tbl[i].ulTargetClockRange) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2250

info->boot_up_engine_clock = le32_to_cpu(info_v8->ulBootUpEngineClock) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2251

info->dentist_vco_freq = le32_to_cpu(info_v8->ulDentistVCOFreq) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2252

info->boot_up_uma_clock = le32_to_cpu(info_v8->ulBootUpUMAClock) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2257

le32_to_cpu(info_v8->sDISPCLK_Voltage[i].

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2260

le32_to_cpu(info_v8->sDISPCLK_Voltage[i].ulVoltageIndex);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2264

le32_to_cpu(info_v8->ulBootUpReqDisplayVector);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2266

le32_to_cpu(info_v8->ulGPUCapInfo);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2276

info->system_config = le32_to_cpu(info_v8->ulSystemConfig);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2277

info->cpu_cap_info = le32_to_cpu(info_v8->ulCPUCapInfo);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2285

le32_to_cpu(info_v8->ulGMCRestoreResetTime);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2288

le32_to_cpu(info_v8->ulNbpStateNClkFreq[0]);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2291

info->minimum_n_clk < le32_to_cpu(info_v8->ulNbpStateNClkFreq[i]) ?

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2292

info->minimum_n_clk : le32_to_cpu(info_v8->ulNbpStateNClkFreq[i]);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2294

info->idle_n_clk = le32_to_cpu(info_v8->ulIdleNClk);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2296

le32_to_cpu(info_v8->ulDDR_DLL_PowerUpTime);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2298

le32_to_cpu(info_v8->ulDDR_PLL_PowerUpTime);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2331

le32_to_cpu(info_v8->ulLCDBitDepthControlVal);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2336

le32_to_cpu(info_v8->sAvail_SCLK[i].ulSupportedSCLK) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2401

info->boot_up_engine_clock = le32_to_cpu(info_v9->ulBootUpEngineClock) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2402

info->dentist_vco_freq = le32_to_cpu(info_v9->ulDentistVCOFreq) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2403

info->boot_up_uma_clock = le32_to_cpu(info_v9->ulBootUpUMAClock) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2408

le32_to_cpu(info_v9->sDISPCLK_Voltage[i].ulMaximumSupportedCLK) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2410

le32_to_cpu(info_v9->sDISPCLK_Voltage[i].ulVoltageIndex);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2414

le32_to_cpu(info_v9->ulBootUpReqDisplayVector);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2415

info->gpu_cap_info = le32_to_cpu(info_v9->ulGPUCapInfo);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2425

info->system_config = le32_to_cpu(info_v9->ulSystemConfig);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2426

info->cpu_cap_info = le32_to_cpu(info_v9->ulCPUCapInfo);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2431

info->gmc_restore_reset_time = le32_to_cpu(info_v9->ulGMCRestoreResetTime);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2433

info->minimum_n_clk = le32_to_cpu(info_v9->ulNbpStateNClkFreq[0]);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2436

info->minimum_n_clk < le32_to_cpu(info_v9->ulNbpStateNClkFreq[i]) ?

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2437

info->minimum_n_clk : le32_to_cpu(info_v9->ulNbpStateNClkFreq[i]);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2439

info->idle_n_clk = le32_to_cpu(info_v9->ulIdleNClk);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2440

info->ddr_dll_power_up_time = le32_to_cpu(info_v9->ulDDR_DLL_PowerUpTime);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2441

info->ddr_pll_power_up_time = le32_to_cpu(info_v9->ulDDR_PLL_PowerUpTime);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2468

le32_to_cpu(info_v9->ulLCDBitDepthControlVal);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

2473

le32_to_cpu(info_v9->sAvail_SCLK[i].ulSupportedSCLK) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

356

info->acpi_device = le32_to_cpu(device_tag->ulACPIDeviceEnum);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

442

le32_to_cpu(firmware_info->ulMinPixelClockPLL_Output) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

444

le32_to_cpu(firmware_info->ulMaxPixelClockPLL_Output) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

493

le32_to_cpu(firmwareInfo->ulMinPixelClockPLL_Output) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

495

le32_to_cpu(firmwareInfo->ulMaxPixelClockPLL_Output) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

497

le32_to_cpu(firmwareInfo->ulDefaultDispEngineClkFreq) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

579

le32_to_cpu(firmware_info->ulMinPixelClockPLL_Output) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

581

le32_to_cpu(firmware_info->ulMaxPixelClockPLL_Output) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

583

le32_to_cpu(firmware_info->ulDefaultDispEngineClkFreq) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser.c

640

(uint32_t) (le32_to_cpu(firmware_info->ulGPUPLL_OutputFreq) * 10);

sys/dev/drm/amd/display/dc/bios/bios_parser.c

713

le32_to_cpu(tbl[i].ulTargetClockRange) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1381

le32_to_cpu(info_v11->gpucapinfo);

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1390

info->system_config = le32_to_cpu(info_v11->system_config);

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1391

info->cpu_cap_info = le32_to_cpu(info_v11->cpucapinfo);

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1507

info->boot_up_engine_clock = le32_to_cpu(info_v11->ulBootUpEngineClock)

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1509

info->dentist_vco_freq = le32_to_cpu(info_v11->ulDentistVCOFreq) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1510

info->boot_up_uma_clock = le32_to_cpu(info_v8->ulBootUpUMAClock) * 10;

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1515

le32_to_cpu(info_v11->sDISPCLK_Voltage[i].

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1518

le32_to_cpu(info_v11->sDISPCLK_Voltage[i].ulVoltageIndex);

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1522

le32_to_cpu(info_v11->ulBootUpReqDisplayVector);

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1528

le32_to_cpu(info_v11->ulGMCRestoreResetTime);

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1530

le32_to_cpu(info_v11->ulNbpStateNClkFreq[0]);

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1534

le32_to_cpu(info_v11->ulNbpStateNClkFreq[i]) ?

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1535

info->minimum_n_clk : le32_to_cpu(

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1538

info->idle_n_clk = le32_to_cpu(info_v11->ulIdleNClk);

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1540

le32_to_cpu(info_v11->ulDDR_DLL_PowerUpTime);

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1542

le32_to_cpu(info_v11->ulDDR_PLL_PowerUpTime);

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1563

le32_to_cpu(info_v11->ulLCDBitDepthControlVal);

sys/dev/drm/amd/display/dc/bios/bios_parser2.c

1568

le32_to_cpu(info_v11->sAvail_SCLK[i].ulSupportedSCLK)

sys/dev/drm/amd/display/dc/bios/command_table.c

1511

(uint64_t)le32_to_cpu(params.sOutput.ulDispPllFreq);

sys/dev/drm/amd/display/dc/bios/command_table.c

2211

(uint32_t)(le32_to_cpu(params.sPCLKInput.ulDispEngClkFreq) * 10);

sys/dev/drm/amd/display/dc/bios/command_table.c

2463

bp_params->target_clock_frequency = le32_to_cpu(params.asParam.ulDCEClkFreq) * 10;

sys/dev/drm/amd/display/dc/bios/command_table2.c

759

bp_params->target_clock_frequency = le32_to_cpu(

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1236

((uint32_t)clockSpeed <= le32_to_cpu(ssInfo->ulTargetClockRange))) {

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1314

*efuse = result ? 0 : le32_to_cpu(efuse_param.ulEfuseValue) & mask;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1356

le32_to_cpu(((GET_EVV_VOLTAGE_INFO_OUTPUT_PARAMETER_V1_3 *)(&get_voltage_info_param_space))->ulVoltageLevel);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1403

param->ulAVFS_meanNsigma_Acontant0 = le32_to_cpu(profile->ulAVFS_meanNsigma_Acontant0);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1404

param->ulAVFS_meanNsigma_Acontant1 = le32_to_cpu(profile->ulAVFS_meanNsigma_Acontant1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1405

param->ulAVFS_meanNsigma_Acontant2 = le32_to_cpu(profile->ulAVFS_meanNsigma_Acontant2);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1409

param->ulGB_VDROOP_TABLE_CKSOFF_a0 = le32_to_cpu(profile->ulGB_VDROOP_TABLE_CKSOFF_a0);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1410

param->ulGB_VDROOP_TABLE_CKSOFF_a1 = le32_to_cpu(profile->ulGB_VDROOP_TABLE_CKSOFF_a1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1411

param->ulGB_VDROOP_TABLE_CKSOFF_a2 = le32_to_cpu(profile->ulGB_VDROOP_TABLE_CKSOFF_a2);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1412

param->ulGB_VDROOP_TABLE_CKSON_a0 = le32_to_cpu(profile->ulGB_VDROOP_TABLE_CKSON_a0);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1413

param->ulGB_VDROOP_TABLE_CKSON_a1 = le32_to_cpu(profile->ulGB_VDROOP_TABLE_CKSON_a1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1414

param->ulGB_VDROOP_TABLE_CKSON_a2 = le32_to_cpu(profile->ulGB_VDROOP_TABLE_CKSON_a2);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1415

param->ulAVFSGB_FUSE_TABLE_CKSOFF_m1 = le32_to_cpu(profile->ulAVFSGB_FUSE_TABLE_CKSOFF_m1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1417

param->ulAVFSGB_FUSE_TABLE_CKSOFF_b = le32_to_cpu(profile->ulAVFSGB_FUSE_TABLE_CKSOFF_b);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1418

param->ulAVFSGB_FUSE_TABLE_CKSON_m1 = le32_to_cpu(profile->ulAVFSGB_FUSE_TABLE_CKSON_m1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1420

param->ulAVFSGB_FUSE_TABLE_CKSON_b = le32_to_cpu(profile->ulAVFSGB_FUSE_TABLE_CKSON_b);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1548

*max_vddc = le32_to_cpu(((ATOM_ASIC_PROFILING_INFO_V3_3 *)profile)->ulMaxVddc) / 4;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1549

*min_vddc = le32_to_cpu(((ATOM_ASIC_PROFILING_INFO_V3_3 *)profile)->ulMinVddc) / 4;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1554

*max_vddc = le32_to_cpu(((ATOM_ASIC_PROFILING_INFO_V3_6 *)profile)->ulMaxVddc) / 100;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

1555

*min_vddc = le32_to_cpu(((ATOM_ASIC_PROFILING_INFO_V3_6 *)profile)->ulMinVddc) / 100;

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

342

le32_to_cpu(mpll_parameters.ulClock.ulClock);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

365

dividers->real_clock = le32_to_cpu(pll_parameters.ulClock);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

391

le32_to_cpu(pll_patameters.ulClock.ulClock);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

461

le32_to_cpu(pll_patameters.ulClock.ulClock);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

557

le32_to_cpu(voltage_object->asGpioVoltageObj.asVolGpioLut[i].ulVoltageId);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

561

le32_to_cpu(voltage_object->asGpioVoltageObj.ulGpioMaskVal);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

699

fDerateTDP = GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulTdpDerateDPM1), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

703

fDerateTDP = GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulTdpDerateDPM2), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

707

fDerateTDP = GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulTdpDerateDPM3), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

711

fDerateTDP = GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulTdpDerateDPM4), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

715

fDerateTDP = GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulTdpDerateDPM5), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

719

fDerateTDP = GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulTdpDerateDPM6), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

723

fDerateTDP = GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulTdpDerateDPM7), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

728

fDerateTDP = GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulTdpDerateDPM0), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

752

ul_RO_fused = le32_to_cpu(sOutput_FuseValues.ulEfuseValue);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

753

fMin = GetScaledFraction(le32_to_cpu(sRO_fuse.ulEfuseMin), 1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

754

fRange = GetScaledFraction(le32_to_cpu(sRO_fuse.ulEfuseEncodeRange), 1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

772

ul_CACm_fused = le32_to_cpu(sOutput_FuseValues.ulEfuseValue);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

773

fMin = GetScaledFraction(le32_to_cpu(sCACm_fuse.ulEfuseMin), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

774

fRange = GetScaledFraction(le32_to_cpu(sCACm_fuse.ulEfuseEncodeRange), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

792

ul_CACb_fused = le32_to_cpu(sOutput_FuseValues.ulEfuseValue);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

793

fMin = GetScaledFraction(le32_to_cpu(sCACb_fuse.ulEfuseMin), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

794

fRange = GetScaledFraction(le32_to_cpu(sCACb_fuse.ulEfuseEncodeRange), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

813

ul_Kt_Beta_fused = le32_to_cpu(sOutput_FuseValues.ulEfuseValue);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

814

fAverage = GetScaledFraction(le32_to_cpu(sKt_Beta_fuse.ulEfuseEncodeAverage), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

815

fRange = GetScaledFraction(le32_to_cpu(sKt_Beta_fuse.ulEfuseEncodeRange), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

834

ul_Kv_m_fused = le32_to_cpu(sOutput_FuseValues.ulEfuseValue);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

835

fAverage = GetScaledFraction(le32_to_cpu(sKv_m_fuse.ulEfuseEncodeAverage), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

836

fRange = GetScaledFraction((le32_to_cpu(sKv_m_fuse.ulEfuseEncodeRange) & 0x7fffffff), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

856

ul_Kv_b_fused = le32_to_cpu(sOutput_FuseValues.ulEfuseValue);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

857

fAverage = GetScaledFraction(le32_to_cpu(sKv_b_fuse.ulEfuseEncodeAverage), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

858

fRange = GetScaledFraction(le32_to_cpu(sKv_b_fuse.ulEfuseEncodeRange), 1000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

887

ul_FT_Lkg_V0NORM = le32_to_cpu(sOutput_FuseValues.ulEfuseValue);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

888

fLn_MaxDivMin = GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulLkgEncodeLn_MaxDivMin), 10000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

889

fMin = GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulLkgEncodeMin), 10000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

899

fSM_A0 = fMultiply(GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulSM_A0), 1000000),

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

901

fSM_A1 = fMultiply(GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulSM_A1), 1000000),

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

903

fSM_A2 = fMultiply(GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulSM_A2), 100000),

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

905

fSM_A3 = fMultiply(GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulSM_A3), 1000000),

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

907

fSM_A4 = fMultiply(GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulSM_A4), 1000000),

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

909

fSM_A5 = fMultiply(GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulSM_A5), 1000),

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

911

fSM_A6 = fMultiply(GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulSM_A6), 1000),

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

913

fSM_A7 = fMultiply(GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulSM_A7), 1000),

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

916

fMargin_RO_a = ConvertToFraction(le32_to_cpu(getASICProfilingInfo->ulMargin_RO_a));

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

917

fMargin_RO_b = ConvertToFraction(le32_to_cpu(getASICProfilingInfo->ulMargin_RO_b));

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

918

fMargin_RO_c = ConvertToFraction(le32_to_cpu(getASICProfilingInfo->ulMargin_RO_c));

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

920

fMargin_fixed = ConvertToFraction(le32_to_cpu(getASICProfilingInfo->ulMargin_fixed));

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

923

le32_to_cpu(getASICProfilingInfo->ulMargin_Fmax_mean), 10000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

925

le32_to_cpu(getASICProfilingInfo->ulMargin_plat_mean), 10000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

927

le32_to_cpu(getASICProfilingInfo->ulMargin_Fmax_sigma), 10000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

929

le32_to_cpu(getASICProfilingInfo->ulMargin_plat_sigma), 10000);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

932

le32_to_cpu(getASICProfilingInfo->ulMargin_DC_sigma), 100);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

944

le32_to_cpu(getASICProfilingInfo->ulMaxVddc), 1000), ConvertToFraction(4));

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

945

fT_prod = GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulBoardCoreTemp), 10);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

946

fLKG_Factor = GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulEvvLkgFactor), 100);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

947

fT_FT = GetScaledFraction(le32_to_cpu(getASICProfilingInfo->ulLeakageTemp), 10);

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

949

le32_to_cpu(getASICProfilingInfo->ulLeakageVoltage), 1000), ConvertToFraction(4));

sys/dev/drm/amd/powerplay/hwmgr/ppatomctrl.c

951

le32_to_cpu(getASICProfilingInfo->ulMinVddc), 1000), ConvertToFraction(4));

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

131

le32_to_cpu(voltage_object->gpio_voltage_obj.

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

137

le32_to_cpu(

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

266

dividers->ulClock = le32_to_cpu(pll_output->gpuclock_10khz);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

267

dividers->ulDid = le32_to_cpu(pll_output->dfs_did);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

268

dividers->ulPll_fb_mult = le32_to_cpu(pll_output->pll_fb_mult);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

269

dividers->ulPll_ss_fbsmult = le32_to_cpu(pll_output->pll_ss_fbsmult);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

297

param->ulMaxVddc = le32_to_cpu(profile->maxvddc);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

298

param->ulMinVddc = le32_to_cpu(profile->minvddc);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

300

le32_to_cpu(profile->avfs_meannsigma_acontant0);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

302

le32_to_cpu(profile->avfs_meannsigma_acontant1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

304

le32_to_cpu(profile->avfs_meannsigma_acontant2);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

312

le32_to_cpu(profile->gb_vdroop_table_cksoff_a0);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

314

le32_to_cpu(profile->gb_vdroop_table_cksoff_a1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

316

le32_to_cpu(profile->gb_vdroop_table_cksoff_a2);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

318

le32_to_cpu(profile->gb_vdroop_table_ckson_a0);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

320

le32_to_cpu(profile->gb_vdroop_table_ckson_a1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

322

le32_to_cpu(profile->gb_vdroop_table_ckson_a2);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

324

le32_to_cpu(profile->avfsgb_fuse_table_cksoff_m1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

326

le32_to_cpu(profile->avfsgb_fuse_table_cksoff_m2);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

328

le32_to_cpu(profile->avfsgb_fuse_table_cksoff_b);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

330

le32_to_cpu(profile->avfsgb_fuse_table_ckson_m1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

332

le32_to_cpu(profile->avfsgb_fuse_table_ckson_m2);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

334

le32_to_cpu(profile->avfsgb_fuse_table_ckson_b);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

344

le32_to_cpu(profile->dispclk2gfxclk_a);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

346

le32_to_cpu(profile->dispclk2gfxclk_b);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

348

le32_to_cpu(profile->dispclk2gfxclk_c);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

350

le32_to_cpu(profile->dcefclk2gfxclk_a);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

352

le32_to_cpu(profile->dcefclk2gfxclk_b);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

354

le32_to_cpu(profile->dcefclk2gfxclk_c);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

356

le32_to_cpu(profile->pixclk2gfxclk_a);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

358

le32_to_cpu(profile->pixclk2gfxclk_b);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

360

le32_to_cpu(profile->pixclk2gfxclk_c);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

362

le32_to_cpu(profile->phyclk2gfxclk_a);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

364

le32_to_cpu(profile->phyclk2gfxclk_b);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

366

le32_to_cpu(profile->phyclk2gfxclk_c);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

377

param->ulMaxVddc = le32_to_cpu(profile_v4_2->maxvddc);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

378

param->ulMinVddc = le32_to_cpu(profile_v4_2->minvddc);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

380

le32_to_cpu(profile_v4_2->avfs_meannsigma_acontant0);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

382

le32_to_cpu(profile_v4_2->avfs_meannsigma_acontant1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

384

le32_to_cpu(profile_v4_2->avfs_meannsigma_acontant2);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

392

le32_to_cpu(profile_v4_2->gb_vdroop_table_cksoff_a0);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

394

le32_to_cpu(profile_v4_2->gb_vdroop_table_cksoff_a1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

396

le32_to_cpu(profile_v4_2->gb_vdroop_table_cksoff_a2);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

398

le32_to_cpu(profile_v4_2->gb_vdroop_table_ckson_a0);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

400

le32_to_cpu(profile_v4_2->gb_vdroop_table_ckson_a1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

402

le32_to_cpu(profile_v4_2->gb_vdroop_table_ckson_a2);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

404

le32_to_cpu(profile_v4_2->avfsgb_fuse_table_cksoff_m1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

406

le32_to_cpu(profile_v4_2->avfsgb_fuse_table_cksoff_m2);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

408

le32_to_cpu(profile_v4_2->avfsgb_fuse_table_cksoff_b);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

410

le32_to_cpu(profile_v4_2->avfsgb_fuse_table_ckson_m1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

412

le32_to_cpu(profile_v4_2->avfsgb_fuse_table_ckson_m2);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

414

le32_to_cpu(profile_v4_2->avfsgb_fuse_table_ckson_b);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

424

le32_to_cpu(profile_v4_2->dispclk2gfxclk_a);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

426

le32_to_cpu(profile_v4_2->dispclk2gfxclk_b);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

428

le32_to_cpu(profile_v4_2->dispclk2gfxclk_c);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

430

le32_to_cpu(profile_v4_2->dcefclk2gfxclk_a);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

432

le32_to_cpu(profile_v4_2->dcefclk2gfxclk_b);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

434

le32_to_cpu(profile_v4_2->dcefclk2gfxclk_c);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

436

le32_to_cpu(profile_v4_2->pixclk2gfxclk_a);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

438

le32_to_cpu(profile_v4_2->pixclk2gfxclk_b);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

440

le32_to_cpu(profile_v4_2->pixclk2gfxclk_c);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

442

le32_to_cpu(profile->phyclk2gfxclk_a);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

444

le32_to_cpu(profile_v4_2->phyclk2gfxclk_b);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

446

le32_to_cpu(profile_v4_2->phyclk2gfxclk_c);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

447

param->ulAcgGbVdroopTableA0 = le32_to_cpu(profile_v4_2->acg_gb_vdroop_table_a0);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

448

param->ulAcgGbVdroopTableA1 = le32_to_cpu(profile_v4_2->acg_gb_vdroop_table_a1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

449

param->ulAcgGbVdroopTableA2 = le32_to_cpu(profile_v4_2->acg_gb_vdroop_table_a2);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

450

param->ulAcgGbFuseTableM1 = le32_to_cpu(profile_v4_2->acg_avfsgb_fuse_table_m1);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

451

param->ulAcgGbFuseTableM2 = le32_to_cpu(profile_v4_2->acg_avfsgb_fuse_table_m2);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

452

param->ulAcgGbFuseTableB = le32_to_cpu(profile_v4_2->acg_avfsgb_fuse_table_b);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

453

param->ucAcgEnableGbVdroopTable = le32_to_cpu(profile_v4_2->enable_acg_gb_vdroop_table);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

454

param->ucAcgEnableGbFuseTable = le32_to_cpu(profile_v4_2->enable_acg_gb_fuse_table);

sys/dev/drm/amd/powerplay/hwmgr/ppatomfwctrl.c

511

*frequency = le32_to_cpu(output->atom_smu_outputclkfreq.smu_clock_freq_hz) / 10000;

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

1003

= (le32_to_cpu(fiji_fan_table->ulMinFanSCLKAcousticLimit) / 100); /* PPTable stores it in 10Khz unit for 2 decimal places. SMC wants MHz. */

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

1081

le32_to_cpu(powerplay_table->ulPlatformCaps));

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

1259

vce_state->evclk = le32_to_cpu(mm_dep_record->ulEClk);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

1260

vce_state->ecclk = le32_to_cpu(mm_dep_record->ulEClk);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

1261

vce_state->sclk = le32_to_cpu(sclk_dep_record->ulSclk);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

1274

vce_state->mclk = le32_to_cpu(mclk_dep_record->ulMclk);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

219

= le32_to_cpu(atom_ppm_table->ulPlatformTDP);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

221

= le32_to_cpu(atom_ppm_table->ulSmallACPlatformTDP);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

223

= le32_to_cpu(atom_ppm_table->ulPlatformTDC);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

225

= le32_to_cpu(atom_ppm_table->ulSmallACPlatformTDC);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

227

= le32_to_cpu(atom_ppm_table->ulApuTDP);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

229

= le32_to_cpu(atom_ppm_table->ulDGpuTDP);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

231

= le32_to_cpu(atom_ppm_table->ulDGpuUlvPower);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

233

= le32_to_cpu(atom_ppm_table->ulTjmax);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

358

limits->sclk = le32_to_cpu(limitable->entries[0].ulSCLKLimit);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

359

limits->mclk = le32_to_cpu(limitable->entries[0].ulMCLKLimit);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

402

mclk_table_record->clk = le32_to_cpu(mclk_dep_record->ulMclk);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

447

sclk_table_record->clk = le32_to_cpu(sclk_dep_record->ulSclk);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

479

sclk_table_record->clk = le32_to_cpu(sclk_dep_record->ulSclk);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

483

sclk_table_record->sclk_offset = le32_to_cpu(sclk_dep_record->ulSclkOffset);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

578

pcie_record->pcie_sclk = le32_to_cpu(atom_pcie_record->ulPCIE_Sclk);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

719

mm_table_record->aclk = le32_to_cpu(mm_dependency_record->ulAClk);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

720

mm_table_record->samclock = le32_to_cpu(mm_dependency_record->ulSAMUClk);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

721

mm_table_record->eclk = le32_to_cpu(mm_dependency_record->ulEClk);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

722

mm_table_record->vclk = le32_to_cpu(mm_dependency_record->ulVClk);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

723

mm_table_record->dclk = le32_to_cpu(mm_dependency_record->ulDClk);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

865

le32_to_cpu(powerplay_table->ulMaxODEngineClock);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

867

le32_to_cpu(powerplay_table->ulMaxODMemoryClock);

sys/dev/drm/amd/powerplay/hwmgr/process_pptables_v1_0.c

968

= (le32_to_cpu(tonga_fan_table->ulMinFanSCLKAcousticLimit) / 100); /* PPTable stores it in 10Khz unit for 2 decimal places. SMC wants MHz. */

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1001

le32_to_cpu(fw_info->ul3DAccelerationEngineClock) & 0x7FF;

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1032

hwmgr->platform_descriptor.overdriveLimit.engineClock = le32_to_cpu(header->ulMaxEngineClock);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1033

hwmgr->platform_descriptor.overdriveLimit.memoryClock = le32_to_cpu(header->ulMaxMemoryClock);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1397

cac_leakage_table->entries[i].Leakage = le32_to_cpu(table->entries[i].ulLeakageValue);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1416

ptr->platform_tdp = le32_to_cpu(atom_ppm_table->ulPlatformTDP);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1417

ptr->small_ac_platform_tdp = le32_to_cpu(atom_ppm_table->ulSmallACPlatformTDP);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1418

ptr->platform_tdc = le32_to_cpu(atom_ppm_table->ulPlatformTDC);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1419

ptr->small_ac_platform_tdc = le32_to_cpu(atom_ppm_table->ulSmallACPlatformTDC);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1420

ptr->apu_tdp = le32_to_cpu(atom_ppm_table->ulApuTDP);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1421

ptr->dgpu_tdp = le32_to_cpu(atom_ppm_table->ulDGpuTDP);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1422

ptr->dgpu_ulv_power = le32_to_cpu(atom_ppm_table->ulDGpuUlvPower);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1423

ptr->tj_max = le32_to_cpu(atom_ppm_table->ulTjmax);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1448

hwmgr->platform_descriptor.TDPLimit = le32_to_cpu(ptable5->ulTDPLimit);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1449

hwmgr->platform_descriptor.nearTDPLimit = le32_to_cpu(ptable5->ulNearTDPLimit);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1460

hwmgr->platform_descriptor.nearTDPLimitAdjusted = le32_to_cpu(ptable5->ulNearTDPLimit);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1466

hwmgr->platform_descriptor.SQRampingThreshold = le32_to_cpu(ptable5->ulSQRampingThreshold);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1468

hwmgr->platform_descriptor.CACLeakage = le32_to_cpu(ptable5->ulCACLeakage);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

1611

le32_to_cpu(powerplay_table->ulPlatformCaps));

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

693

tmp = le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

698

tmp = le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

703

ps->pcie.lanes = ((le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

711

rrr_index = (le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

728

tmp = le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

733

tmp = le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

738

ps->memory.m3arb = (le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

747

tmp = le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

752

tmp = le32_to_cpu(pnon_clock_info->ulCapsAndSettings) &

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

760

ps->uvd_clocks.VCLK = le32_to_cpu(pnon_clock_info->ulVCLK);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

761

ps->uvd_clocks.DCLK = le32_to_cpu(pnon_clock_info->ulDCLK);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

995

le32_to_cpu(fw_info->ulASICMaxEngineClock);

sys/dev/drm/amd/powerplay/hwmgr/processpptables.c

998

le32_to_cpu(fw_info->ulASICMaxMemoryClock);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3075

le32_to_cpu(fw_info->ulDefaultEngineClock);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3077

le32_to_cpu(fw_info->ulDefaultMemoryClock);

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3147

(0 != (le32_to_cpu(state_entry->ulCapsAndSettings) &

sys/dev/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

3155

(0 != (le32_to_cpu(state_entry->ulCapsAndSettings) &

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

333

le32_to_cpu(info->ulBootUpUMAClock);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

336

le32_to_cpu(info->ulBootUpEngineClock);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

339

le32_to_cpu(info->ulDentistVCOFreq);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

342

le32_to_cpu(info->ulSystemConfig);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

361

(le32_to_cpu(info->ulSystemConfig) >> 3 & 0x1);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

366

le32_to_cpu(info->ulNbpStateMemclkFreq[i]);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

369

le32_to_cpu(info->ulNbpStateNClkFreq[i]);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

374

le32_to_cpu(info->sDispClkVoltageMapping[i].ulMaximumSupportedCLK);

sys/dev/drm/amd/powerplay/hwmgr/smu8_hwmgr.c

396

if (le32_to_cpu(info->ulGPUCapInfo) &

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

57

table[i] = le32_to_cpu(pptable_array[i]);

sys/dev/drm/amd/powerplay/hwmgr/smu_helper.c

79

table[i] = le32_to_cpu(pptable_array[i]);

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3010

((le32_to_cpu(state_entry->ulCapsAndSettings) &

sys/dev/drm/amd/powerplay/hwmgr/vega10_hwmgr.c

3016

((le32_to_cpu(state_entry->ulCapsAndSettings) &

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

1155

le32_to_cpu(powerplay_table->ulPlatformCaps));

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

282

le32_to_cpu(powerplay_table->ulMaxODEngineClock);

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

284

le32_to_cpu(powerplay_table->ulMaxODMemoryClock);

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

319

le32_to_cpu(mm_dependency_record->ulPSPClk);

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

320

mm_table->entries[i].eclk = le32_to_cpu(mm_dependency_record->ulEClk);

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

321

mm_table->entries[i].vclk = le32_to_cpu(mm_dependency_record->ulVClk);

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

322

mm_table->entries[i].dclk = le32_to_cpu(mm_dependency_record->ulDClk);

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

490

tdp_table->ulBoostClock = le32_to_cpu(power_tune_table_v3->ulBoostClock);

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

546

le32_to_cpu(clk_dep_table->entries[i].ulClk);

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

584

le32_to_cpu(mclk_dep_table->entries[i].ulMemClk);

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

622

le32_to_cpu(clk_dep_table->entries[i].ulClk);

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

637

le32_to_cpu(patom_record_v2->ulClk);

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

687

le32_to_cpu(clk_dep_table->entries[i].ulClk);

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

744

le32_to_cpu(clk_dep_table->entries[i].ulClk);

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

814

limits->sclk = le32_to_cpu(limit_table->entries[0].ulSOCCLKLimit);

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

815

limits->mclk = le32_to_cpu(limit_table->entries[0].ulMCLKLimit);

sys/dev/drm/amd/powerplay/hwmgr/vega10_processpptables.c

816

limits->gfxclk = le32_to_cpu(limit_table->entries[0].ulGFXCLKLimit);

sys/dev/drm/amd/powerplay/hwmgr/vega12_processpptables.c

209

if (le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_GFXCLKFMAX]) > VEGA12_ENGINECLOCK_HARDMAX)

sys/dev/drm/amd/powerplay/hwmgr/vega12_processpptables.c

213

le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_GFXCLKFMAX]);

sys/dev/drm/amd/powerplay/hwmgr/vega12_processpptables.c

215

le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_UCLKFMAX]);

sys/dev/drm/amd/powerplay/hwmgr/vega12_processpptables.c

242

hwmgr->platform_descriptor.TDPODLimit = le32_to_cpu(powerplay_table->ODSettingsMax[ATOM_VEGA12_ODSETTING_POWERPERCENTAGE]);

sys/dev/drm/amd/powerplay/hwmgr/vega12_processpptables.c

285

le32_to_cpu(powerplay_table->ulPlatformCaps));

sys/dev/drm/amd/powerplay/hwmgr/vega20_processpptables.c

700

table[i] = le32_to_cpu(pptable_array[i]);

sys/dev/drm/amd/powerplay/hwmgr/vega20_processpptables.c

825

(le32_to_cpu(powerplay_table->OverDrive8Table.ODFeatureCount) >

sys/dev/drm/amd/powerplay/hwmgr/vega20_processpptables.c

828

le32_to_cpu(powerplay_table->OverDrive8Table.ODFeatureCount);

sys/dev/drm/amd/powerplay/hwmgr/vega20_processpptables.c

830

(le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingCount) >

sys/dev/drm/amd/powerplay/hwmgr/vega20_processpptables.c

833

le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingCount);

sys/dev/drm/amd/powerplay/hwmgr/vega20_processpptables.c

857

hwmgr->platform_descriptor.TDPODLimit = le32_to_cpu(powerplay_table->OverDrive8Table.ODSettingsMax[ATOM_VEGA20_ODSETTING_POWERPERCENTAGE]);

sys/dev/drm/amd/powerplay/hwmgr/vega20_processpptables.c

866

(le32_to_cpu(powerplay_table->PowerSavingClockTable.PowerSavingClockCount) >=

sys/dev/drm/amd/powerplay/hwmgr/vega20_processpptables.c

869

le32_to_cpu(powerplay_table->PowerSavingClockTable.PowerSavingClockCount);

sys/dev/drm/amd/powerplay/hwmgr/vega20_processpptables.c

912

le32_to_cpu(powerplay_table->ulPlatformCaps));

sys/dev/drm/radeon/atom.c

1415

le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware),

sys/dev/drm/radeon/atombios_crtc.c

734

adjusted_clock = le32_to_cpu(args.v3.sOutput.ulDispPllFreq) * 10;

sys/dev/drm/radeon/atombios_dp.c

72

dst_tmp[i] = le32_to_cpu(src_tmp[i]);

sys/dev/drm/radeon/ci_dpm.c

5488

rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings);

sys/dev/drm/radeon/ci_dpm.c

5493

rps->vclk = le32_to_cpu(non_clock_info->ulVCLK);

sys/dev/drm/radeon/ci_dpm.c

5494

rps->dclk = le32_to_cpu(non_clock_info->ulDCLK);

sys/dev/drm/radeon/ci_dpm.c

5695

boot_state->sclk_bootup_value = le32_to_cpu(firmware_info->ulDefaultEngineClock);

sys/dev/drm/radeon/ci_dpm.c

5696

boot_state->mclk_bootup_value = le32_to_cpu(firmware_info->ulDefaultMemoryClock);

sys/dev/drm/radeon/ci_smc.c

203

ucode_start_address = le32_to_cpu(hdr->ucode_start_addr);

sys/dev/drm/radeon/ci_smc.c

204

ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes);

sys/dev/drm/radeon/ci_smc.c

206

(rdev->smc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/cik.c

1873

regs_size = le32_to_cpu(hdr->io_debug_size_bytes) / (4 * 2);

sys/dev/drm/radeon/cik.c

1875

(rdev->mc_fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes));

sys/dev/drm/radeon/cik.c

1876

ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/radeon/cik.c

1878

(rdev->mc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/cik.c

3935

(rdev->pfp_fw->data + le32_to_cpu(pfp_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/cik.c

3936

fw_size = le32_to_cpu(pfp_hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/radeon/cik.c

3940

WREG32(CP_PFP_UCODE_ADDR, le32_to_cpu(pfp_hdr->header.ucode_version));

sys/dev/drm/radeon/cik.c

3944

(rdev->ce_fw->data + le32_to_cpu(ce_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/cik.c

3945

fw_size = le32_to_cpu(ce_hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/radeon/cik.c

3949

WREG32(CP_CE_UCODE_ADDR, le32_to_cpu(ce_hdr->header.ucode_version));

sys/dev/drm/radeon/cik.c

3953

(rdev->me_fw->data + le32_to_cpu(me_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/cik.c

3954

fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/radeon/cik.c

3958

WREG32(CP_ME_RAM_WADDR, le32_to_cpu(me_hdr->header.ucode_version));

sys/dev/drm/radeon/cik.c

3959

WREG32(CP_ME_RAM_RADDR, le32_to_cpu(me_hdr->header.ucode_version));

sys/dev/drm/radeon/cik.c

4291

(rdev->mec_fw->data + le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/cik.c

4292

fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/radeon/cik.c

4296

WREG32(CP_MEC_ME1_UCODE_ADDR, le32_to_cpu(mec_hdr->header.ucode_version));

sys/dev/drm/radeon/cik.c

4305

le32_to_cpu(mec2_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/cik.c

4306

fw_size = le32_to_cpu(mec2_hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/radeon/cik.c

4310

WREG32(CP_MEC_ME2_UCODE_ADDR, le32_to_cpu(mec2_hdr->header.ucode_version));

sys/dev/drm/radeon/cik.c

5970

(rdev->rlc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/cik.c

5974

size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/radeon/cik.c

5978

WREG32(RLC_GPM_UCODE_ADDR, le32_to_cpu(hdr->header.ucode_version));

sys/dev/drm/radeon/cik.c

6460

(rdev->ce_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/cik.c

6461

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/radeon/cik.c

6462

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/radeon/cik.c

6466

(rdev->pfp_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/cik.c

6467

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/radeon/cik.c

6468

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/radeon/cik.c

6472

(rdev->me_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/cik.c

6473

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/radeon/cik.c

6474

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/radeon/cik.c

6478

(rdev->mec_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/cik.c

6479

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/radeon/cik.c

6480

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/radeon/cik.c

6484

(rdev->mec2_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/cik.c

6485

table_offset = le32_to_cpu(hdr->jt_offset);

sys/dev/drm/radeon/cik.c

6486

table_size = le32_to_cpu(hdr->jt_size);

sys/dev/drm/radeon/cik.c

6491

cpu_to_le32(le32_to_cpu(fw_data[table_offset + i]));

sys/dev/drm/radeon/cik.c

7513

wptr = le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]);

sys/dev/drm/radeon/cik.c

7603

src_id = le32_to_cpu(rdev->ih.ring[ring_index]) & 0xff;

sys/dev/drm/radeon/cik.c

7604

src_data = le32_to_cpu(rdev->ih.ring[ring_index + 1]) & 0xfffffff;

sys/dev/drm/radeon/cik.c

7605

ring_id = le32_to_cpu(rdev->ih.ring[ring_index + 2]) & 0xff;

sys/dev/drm/radeon/cik_sdma.c

480

(rdev->sdma_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/cik_sdma.c

481

fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/radeon/cik_sdma.c

489

(rdev->sdma_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/cik_sdma.c

490

fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/radeon/cik_sdma.c

675

tmp = le32_to_cpu(rdev->wb.wb[index/4]);

sys/dev/drm/radeon/cik_sdma.c

749

tmp = le32_to_cpu(rdev->wb.wb[index/4]);

sys/dev/drm/radeon/evergreen.c

4663

wptr = le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]);

sys/dev/drm/radeon/evergreen.c

4722

src_id = le32_to_cpu(rdev->ih.ring[ring_index]) & 0xff;

sys/dev/drm/radeon/evergreen.c

4723

src_data = le32_to_cpu(rdev->ih.ring[ring_index + 1]) & 0xfffffff;

sys/dev/drm/radeon/kv_dpm.c

2504

pi->sys_info.bootup_sclk = le32_to_cpu(igp_info->info_8.ulBootUpEngineClock);

sys/dev/drm/radeon/kv_dpm.c

2505

pi->sys_info.bootup_uma_clk = le32_to_cpu(igp_info->info_8.ulBootUpUMAClock);

sys/dev/drm/radeon/kv_dpm.c

2520

if (le32_to_cpu(igp_info->info_8.ulSystemConfig) & (1 << 3))

sys/dev/drm/radeon/kv_dpm.c

2527

le32_to_cpu(igp_info->info_8.ulNbpStateMemclkFreq[i]);

sys/dev/drm/radeon/kv_dpm.c

2529

le32_to_cpu(igp_info->info_8.ulNbpStateNClkFreq[i]);

sys/dev/drm/radeon/kv_dpm.c

2531

if (le32_to_cpu(igp_info->info_8.ulGPUCapInfo) &

sys/dev/drm/radeon/kv_dpm.c

2586

rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings);

sys/dev/drm/radeon/kv_dpm.c

2591

rps->vclk = le32_to_cpu(non_clock_info->ulVCLK);

sys/dev/drm/radeon/kv_dpm.c

2592

rps->dclk = le32_to_cpu(non_clock_info->ulDCLK);

sys/dev/drm/radeon/ni_dpm.c

3899

rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings);

sys/dev/drm/radeon/ni_dpm.c

3904

rps->vclk = le32_to_cpu(non_clock_info->ulVCLK);

sys/dev/drm/radeon/ni_dpm.c

3905

rps->dclk = le32_to_cpu(non_clock_info->ulDCLK);

sys/dev/drm/radeon/ni_dpm.c

3938

pl->flags = le32_to_cpu(clock_info->evergreen.ulFlags);

sys/dev/drm/radeon/r100.c

1064

rptr = le32_to_cpu(rdev->wb.wb[ring->rptr_offs/4]);

sys/dev/drm/radeon/r600.c

4056

wptr = le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]);

sys/dev/drm/radeon/r600.c

4142

src_id = le32_to_cpu(rdev->ih.ring[ring_index]) & 0xff;

sys/dev/drm/radeon/r600.c

4143

src_data = le32_to_cpu(rdev->ih.ring[ring_index + 1]) & 0xfffffff;

sys/dev/drm/radeon/r600_dma.c

259

tmp = le32_to_cpu(rdev->wb.wb[index/4]);

sys/dev/drm/radeon/r600_dma.c

380

tmp = le32_to_cpu(rdev->wb.wb[index/4]);

sys/dev/drm/radeon/r600_dpm.c

1021

rdev->pm.dpm.tdp_limit = le32_to_cpu(power_info->pplib5.ulTDPLimit);

sys/dev/drm/radeon/r600_dpm.c

1022

rdev->pm.dpm.near_tdp_limit = le32_to_cpu(power_info->pplib5.ulNearTDPLimit);

sys/dev/drm/radeon/r600_dpm.c

1030

rdev->pm.dpm.sq_ramping_threshold = le32_to_cpu(power_info->pplib5.ulSQRampingThreshold);

sys/dev/drm/radeon/r600_dpm.c

1031

rdev->pm.dpm.cac_leakage = le32_to_cpu(power_info->pplib5.ulCACLeakage);

sys/dev/drm/radeon/r600_dpm.c

1058

le32_to_cpu(entry->ulLeakageValue);

sys/dev/drm/radeon/r600_dpm.c

1213

le32_to_cpu(ppm->ulPlatformTDP);

sys/dev/drm/radeon/r600_dpm.c

1215

le32_to_cpu(ppm->ulSmallACPlatformTDP);

sys/dev/drm/radeon/r600_dpm.c

1217

le32_to_cpu(ppm->ulPlatformTDC);

sys/dev/drm/radeon/r600_dpm.c

1219

le32_to_cpu(ppm->ulSmallACPlatformTDC);

sys/dev/drm/radeon/r600_dpm.c

1221

le32_to_cpu(ppm->ulApuTDP);

sys/dev/drm/radeon/r600_dpm.c

1223

le32_to_cpu(ppm->ulDGpuTDP);

sys/dev/drm/radeon/r600_dpm.c

1225

le32_to_cpu(ppm->ulDGpuUlvPower);

sys/dev/drm/radeon/r600_dpm.c

1227

le32_to_cpu(ppm->ulTjmax);

sys/dev/drm/radeon/r600_dpm.c

859

rdev->pm.dpm.platform_caps = le32_to_cpu(power_info->pplib.ulPlatformCaps);

sys/dev/drm/radeon/radeon_atombios.c

1122

le32_to_cpu(igp_info->info_6.ulDentistVCOFreq);

sys/dev/drm/radeon/radeon_atombios.c

1155

le32_to_cpu(firmware_info->info_12.ulMinPixelClockPLL_Output);

sys/dev/drm/radeon/radeon_atombios.c

1157

le32_to_cpu(firmware_info->info.ulMaxPixelClockPLL_Output);

sys/dev/drm/radeon/radeon_atombios.c

1199

le32_to_cpu(firmware_info->info.ulMaxEngineClockPLL_Output);

sys/dev/drm/radeon/radeon_atombios.c

1226

le32_to_cpu(firmware_info->info.ulMaxMemoryClockPLL_Output);

sys/dev/drm/radeon/radeon_atombios.c

1242

le32_to_cpu(firmware_info->info.ulDefaultEngineClock);

sys/dev/drm/radeon/radeon_atombios.c

1244

le32_to_cpu(firmware_info->info.ulDefaultMemoryClock);

sys/dev/drm/radeon/radeon_atombios.c

1248

le32_to_cpu(firmware_info->info_21.ulDefaultDispEngineClkFreq);

sys/dev/drm/radeon/radeon_atombios.c

1279

le32_to_cpu(firmware_info->info_22.ulGPUPLL_OutputFreq);

sys/dev/drm/radeon/radeon_atombios.c

1314

if (le32_to_cpu(igp_info->info.ulBootUpMemoryClock))

sys/dev/drm/radeon/radeon_atombios.c

1318

if (le32_to_cpu(igp_info->info_2.ulBootUpSidePortClock))

sys/dev/drm/radeon/radeon_atombios.c

1542

(clock <= le32_to_cpu(ss_assign->v1.ulTargetClockRange))) {

sys/dev/drm/radeon/radeon_atombios.c

1560

(clock <= le32_to_cpu(ss_assign->v2.ulTargetClockRange))) {

sys/dev/drm/radeon/radeon_atombios.c

1582

(clock <= le32_to_cpu(ss_assign->v3.ulTargetClockRange))) {

sys/dev/drm/radeon/radeon_atombios.c

2147

misc = le32_to_cpu(power_info->info.asPowerPlayInfo[i].ulMiscInfo);

sys/dev/drm/radeon/radeon_atombios.c

2173

le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulMemoryClock);

sys/dev/drm/radeon/radeon_atombios.c

2175

le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulEngineClock);

sys/dev/drm/radeon/radeon_atombios.c

2182

misc = le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulMiscInfo);

sys/dev/drm/radeon/radeon_atombios.c

2183

misc2 = le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulMiscInfo2);

sys/dev/drm/radeon/radeon_atombios.c

2209

le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulMemoryClock);

sys/dev/drm/radeon/radeon_atombios.c

2211

le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulEngineClock);

sys/dev/drm/radeon/radeon_atombios.c

2218

misc = le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulMiscInfo);

sys/dev/drm/radeon/radeon_atombios.c

2219

misc2 = le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulMiscInfo2);

sys/dev/drm/radeon/radeon_atombios.c

2403

u32 misc = le32_to_cpu(non_clock_info->ulCapsAndSettings);

sys/dev/drm/radeon/radeon_atombios.c

2869

dividers->enable_post_div = (le32_to_cpu(args.v2.ulClock) & (1 << 24)) ?

sys/dev/drm/radeon/radeon_atombios.c

2871

dividers->vco_mode = (le32_to_cpu(args.v2.ulClock) & (1 << 25)) ? 1 : 0;

sys/dev/drm/radeon/radeon_atombios.c

2920

dividers->real_clock = le32_to_cpu(args.v4.ulClock);

sys/dev/drm/radeon/radeon_atombios.c

2935

dividers->real_clock = le32_to_cpu(args.v6_out.ulClock.ulClock);

sys/dev/drm/radeon/radeon_atombios.c

3011

return le32_to_cpu(args.ulReturnEngineClock);

sys/dev/drm/radeon/radeon_atombios.c

3020

return le32_to_cpu(args.ulReturnMemoryClock);

sys/dev/drm/radeon/radeon_atombios.c

3352

*gpio_mask = le32_to_cpu(*(u32 *)&args.v2);

sys/dev/drm/radeon/radeon_atombios.c

3360

*gpio_value = le32_to_cpu(*(u32 *)&args.v2);

sys/dev/drm/radeon/radeon_atombios.c

3784

le32_to_cpu(lut->ulVoltageId);

sys/dev/drm/radeon/radeon_atombios.c

3788

voltage_table->mask_low = le32_to_cpu(gpio->ulGpioMaskVal);

sys/dev/drm/radeon/radeon_atombios.c

3943

mclk_range_table->mclk[i] = le32_to_cpu(format->ulClkRange);

sys/dev/drm/radeon/radeon_atombios.c

4023

while ((le32_to_cpu(*(u32 *)reg_data) != END_OF_REG_DATA_BLOCK) &&

sys/dev/drm/radeon/radeon_atombios.c

4025

t_mem_id = (u8)((le32_to_cpu(*(u32 *)reg_data) & MEM_ID_MASK)

sys/dev/drm/radeon/radeon_atombios.c

4029

(u32)((le32_to_cpu(*(u32 *)reg_data) & CLOCK_RANGE_MASK)

sys/dev/drm/radeon/radeon_atombios.c

4034

(u32)le32_to_cpu(*((u32 *)reg_data + j));

sys/dev/drm/radeon/radeon_atombios.c

4046

if (le32_to_cpu(*(u32 *)reg_data) != END_OF_REG_DATA_BLOCK)

sys/dev/drm/radeon/radeon_fence.c

89

seq = le32_to_cpu(*drv->cpu_addr);

sys/dev/drm/radeon/radeon_ring.c

301

ptr = le32_to_cpu(*ring->next_rptr_cpu_addr);

sys/dev/drm/radeon/radeon_ucode.c

118

le32_to_cpu(rlc_hdr->ucode_feature_version));

sys/dev/drm/radeon/radeon_ucode.c

120

le32_to_cpu(rlc_hdr->save_and_restore_offset));

sys/dev/drm/radeon/radeon_ucode.c

122

le32_to_cpu(rlc_hdr->clear_state_descriptor_offset));

sys/dev/drm/radeon/radeon_ucode.c

124

le32_to_cpu(rlc_hdr->avail_scratch_ram_locations));

sys/dev/drm/radeon/radeon_ucode.c

126

le32_to_cpu(rlc_hdr->master_pkt_description_offset));

sys/dev/drm/radeon/radeon_ucode.c

145

le32_to_cpu(sdma_hdr->ucode_feature_version));

sys/dev/drm/radeon/radeon_ucode.c

147

le32_to_cpu(sdma_hdr->ucode_change_version));

sys/dev/drm/radeon/radeon_ucode.c

148

DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(sdma_hdr->jt_offset));

sys/dev/drm/radeon/radeon_ucode.c

149

DRM_DEBUG("jt_size: %u\n", le32_to_cpu(sdma_hdr->jt_size));

sys/dev/drm/radeon/radeon_ucode.c

161

if (fw->datasize == le32_to_cpu(hdr->size_bytes))

sys/dev/drm/radeon/radeon_ucode.c

32

DRM_DEBUG("size_bytes: %u\n", le32_to_cpu(hdr->size_bytes));

sys/dev/drm/radeon/radeon_ucode.c

33

DRM_DEBUG("header_size_bytes: %u\n", le32_to_cpu(hdr->header_size_bytes));

sys/dev/drm/radeon/radeon_ucode.c

38

DRM_DEBUG("ucode_version: 0x%08x\n", le32_to_cpu(hdr->ucode_version));

sys/dev/drm/radeon/radeon_ucode.c

39

DRM_DEBUG("ucode_size_bytes: %u\n", le32_to_cpu(hdr->ucode_size_bytes));

sys/dev/drm/radeon/radeon_ucode.c

41

le32_to_cpu(hdr->ucode_array_offset_bytes));

sys/dev/drm/radeon/radeon_ucode.c

42

DRM_DEBUG("crc32: 0x%08x\n", le32_to_cpu(hdr->crc32));

sys/dev/drm/radeon/radeon_ucode.c

58

le32_to_cpu(mc_hdr->io_debug_size_bytes));

sys/dev/drm/radeon/radeon_ucode.c

60

le32_to_cpu(mc_hdr->io_debug_array_offset_bytes));

sys/dev/drm/radeon/radeon_ucode.c

78

DRM_DEBUG("ucode_start_addr: %u\n", le32_to_cpu(smc_hdr->ucode_start_addr));

sys/dev/drm/radeon/radeon_ucode.c

97

le32_to_cpu(gfx_hdr->ucode_feature_version));

sys/dev/drm/radeon/radeon_ucode.c

98

DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset));

sys/dev/drm/radeon/radeon_ucode.c

99

DRM_DEBUG("jt_size: %u\n", le32_to_cpu(gfx_hdr->jt_size));

sys/dev/drm/radeon/radeon_uvd.c

155

family_id = le32_to_cpu(hdr->ucode_version) & 0xff;

sys/dev/drm/radeon/radeon_uvd.c

156

version_major = (le32_to_cpu(hdr->ucode_version) >> 24) & 0xff;

sys/dev/drm/radeon/radeon_uvd.c

157

version_minor = (le32_to_cpu(hdr->ucode_version) >> 8) & 0xff;

sys/dev/drm/radeon/rs690.c

103

rdev->pm.igp_ht_link_clk.full = dfixed_const(le32_to_cpu(info->info_v2.ulHTLinkFreq));

sys/dev/drm/radeon/rs690.c

80

rdev->pm.igp_sideport_mclk.full = dfixed_const(le32_to_cpu(info->info.ulBootUpMemoryClock));

sys/dev/drm/radeon/rs690.c

94

rdev->pm.igp_sideport_mclk.full = dfixed_const(le32_to_cpu(info->info_v2.ulBootUpSidePortClock));

sys/dev/drm/radeon/rs690.c

96

if (le32_to_cpu(info->info_v2.ulBootUpUMAClock))

sys/dev/drm/radeon/rs690.c

97

rdev->pm.igp_system_mclk.full = dfixed_const(le32_to_cpu(info->info_v2.ulBootUpUMAClock));

sys/dev/drm/radeon/rs780_dpm.c

722

rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings);

sys/dev/drm/radeon/rs780_dpm.c

727

rps->vclk = le32_to_cpu(non_clock_info->ulVCLK);

sys/dev/drm/radeon/rs780_dpm.c

728

rps->dclk = le32_to_cpu(non_clock_info->ulDCLK);

sys/dev/drm/radeon/rs780_dpm.c

779

ps->flags = le32_to_cpu(clock_info->rs780.ulFlags);

sys/dev/drm/radeon/rs780_dpm.c

908

le32_to_cpu(info->info_2.ulSystemConfig);

sys/dev/drm/radeon/rs780_dpm.c

912

pi->bootup_uma_clk = le32_to_cpu(info->info_2.ulBootUpUMAClock);

sys/dev/drm/radeon/rv6xx_dpm.c

1799

rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings);

sys/dev/drm/radeon/rv6xx_dpm.c

1847

pl->flags = le32_to_cpu(clock_info->r600.ulFlags);

sys/dev/drm/radeon/rv770_dpm.c

2153

rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings);

sys/dev/drm/radeon/rv770_dpm.c

2158

rps->vclk = le32_to_cpu(non_clock_info->ulVCLK);

sys/dev/drm/radeon/rv770_dpm.c

2159

rps->dclk = le32_to_cpu(non_clock_info->ulDCLK);

sys/dev/drm/radeon/rv770_dpm.c

2209

pl->flags = le32_to_cpu(clock_info->evergreen.ulFlags);

sys/dev/drm/radeon/rv770_dpm.c

2217

pl->flags = le32_to_cpu(clock_info->r600.ulFlags);

sys/dev/drm/radeon/si.c

1579

regs_size = le32_to_cpu(hdr->io_debug_size_bytes) / (4 * 2);

sys/dev/drm/radeon/si.c

1581

(rdev->mc_fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes));

sys/dev/drm/radeon/si.c

1582

ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/radeon/si.c

1584

(rdev->mc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/si.c

3491

(rdev->pfp_fw->data + le32_to_cpu(pfp_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/si.c

3492

fw_size = le32_to_cpu(pfp_hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/radeon/si.c

3500

(rdev->ce_fw->data + le32_to_cpu(ce_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/si.c

3501

fw_size = le32_to_cpu(ce_hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/radeon/si.c

3509

(rdev->me_fw->data + le32_to_cpu(me_hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/si.c

3510

fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/radeon/si.c

5879

u32 fw_size = le32_to_cpu(hdr->header.ucode_size_bytes) / 4;

sys/dev/drm/radeon/si.c

5881

(rdev->rlc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/si.c

6201

wptr = le32_to_cpu(rdev->wb.wb[R600_WB_IH_WPTR_OFFSET/4]);

sys/dev/drm/radeon/si.c

6268

src_id = le32_to_cpu(rdev->ih.ring[ring_index]) & 0xff;

sys/dev/drm/radeon/si.c

6269

src_data = le32_to_cpu(rdev->ih.ring[ring_index + 1]) & 0xfffffff;

sys/dev/drm/radeon/si.c

6270

ring_id = le32_to_cpu(rdev->ih.ring[ring_index + 2]) & 0xff;

sys/dev/drm/radeon/si_dpm.c

6711

rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings);

sys/dev/drm/radeon/si_dpm.c

6716

rps->vclk = le32_to_cpu(non_clock_info->ulVCLK);

sys/dev/drm/radeon/si_dpm.c

6717

rps->dclk = le32_to_cpu(non_clock_info->ulDCLK);

sys/dev/drm/radeon/si_dpm.c

6753

pl->flags = le32_to_cpu(clock_info->si.ulFlags);

sys/dev/drm/radeon/si_smc.c

228

ucode_start_address = le32_to_cpu(hdr->ucode_start_addr);

sys/dev/drm/radeon/si_smc.c

229

ucode_size = le32_to_cpu(hdr->header.ucode_size_bytes);

sys/dev/drm/radeon/si_smc.c

231

(rdev->smc_fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes));

sys/dev/drm/radeon/sumo_dpm.c

1412

rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings);

sys/dev/drm/radeon/sumo_dpm.c

1417

rps->vclk = le32_to_cpu(non_clock_info->ulVCLK);

sys/dev/drm/radeon/sumo_dpm.c

1418

rps->dclk = le32_to_cpu(non_clock_info->ulDCLK);

sys/dev/drm/radeon/sumo_dpm.c

1676

pi->sys_info.bootup_sclk = le32_to_cpu(igp_info->info_6.ulBootUpEngineClock);

sys/dev/drm/radeon/sumo_dpm.c

1677

pi->sys_info.min_sclk = le32_to_cpu(igp_info->info_6.ulMinEngineClock);

sys/dev/drm/radeon/sumo_dpm.c

1678

pi->sys_info.bootup_uma_clk = le32_to_cpu(igp_info->info_6.ulBootUpUMAClock);

sys/dev/drm/radeon/sumo_dpm.c

1694

le32_to_cpu(igp_info->info_6.ulCSR_M3_ARB_CNTL_DEFAULT[i]);

sys/dev/drm/radeon/sumo_dpm.c

1696

le32_to_cpu(igp_info->info_6.ulCSR_M3_ARB_CNTL_UVD[i]);

sys/dev/drm/radeon/sumo_dpm.c

1698

le32_to_cpu(igp_info->info_6.ulCSR_M3_ARB_CNTL_FS3D[i]);

sys/dev/drm/radeon/sumo_dpm.c

1701

le32_to_cpu(igp_info->info_6.SclkDpmBoostMargin);

sys/dev/drm/radeon/sumo_dpm.c

1703

le32_to_cpu(igp_info->info_6.SclkDpmThrottleMargin);

sys/dev/drm/radeon/sumo_dpm.c

1709

pi->sys_info.boost_sclk = le32_to_cpu(igp_info->info_6.ulBoostEngineCLock);

sys/dev/drm/radeon/trinity_dpm.c

1692

rps->caps = le32_to_cpu(non_clock_info->ulCapsAndSettings);

sys/dev/drm/radeon/trinity_dpm.c

1697

rps->vclk = le32_to_cpu(non_clock_info->ulVCLK);

sys/dev/drm/radeon/trinity_dpm.c

1698

rps->dclk = le32_to_cpu(non_clock_info->ulDCLK);

sys/dev/drm/radeon/trinity_dpm.c

1869

pi->sys_info.bootup_sclk = le32_to_cpu(igp_info->info_7.ulBootUpEngineClock);

sys/dev/drm/radeon/trinity_dpm.c

1870

pi->sys_info.min_sclk = le32_to_cpu(igp_info->info_7.ulMinEngineClock);

sys/dev/drm/radeon/trinity_dpm.c

1871

pi->sys_info.bootup_uma_clk = le32_to_cpu(igp_info->info_7.ulBootUpUMAClock);

sys/dev/drm/radeon/trinity_dpm.c

1872

pi->sys_info.dentist_vco_freq = le32_to_cpu(igp_info->info_7.ulDentistVCOFreq);

sys/dev/drm/radeon/trinity_dpm.c

1893

pi->sys_info.nbp_mclk[i] = le32_to_cpu(igp_info->info_7.ulNbpStateMemclkFreq[i]);

sys/dev/drm/radeon/trinity_dpm.c

1894

pi->sys_info.nbp_nclk[i] = le32_to_cpu(igp_info->info_7.ulNbpStateNClkFreq[i]);

sys/dev/drm/radeon/vce_v1_0.c

182

for (i = 0; i < le32_to_cpu(sign->num); ++i) {

sys/dev/drm/radeon/vce_v1_0.c

183

if (le32_to_cpu(sign->val[i].chip_id) == chip_id)

sys/dev/drm/radeon/vce_v1_0.c

187

if (i == le32_to_cpu(sign->num))

sys/dev/drm/radeon/vce_v1_0.c

195

data[4] = cpu_to_le32(le32_to_cpu(sign->len) + 64);

sys/dev/drm/radeon/vce_v1_0.c

200

data += (le32_to_cpu(sign->len) + 64) / 4;

sys/dev/drm/radeon/vce_v1_0.c

206

rdev->vce.keyselect = le32_to_cpu(sign->val[i].keyselect);