sys/bus/gpio/gpio_acpi/gpio_acpi.c

103

gpio_acpi_check_gpioint(device_t dev, ACPI_RESOURCE_GPIO *gpio)

sys/bus/gpio/gpio_acpi/gpio_acpi.c

105

if (gpio->PinTableLength != 1) {

sys/bus/gpio/gpio_acpi/gpio_acpi.c

108

gpio->PinTableLength);

sys/bus/gpio/gpio_acpi/gpio_acpi.c

111

switch (gpio->Triggering) {

sys/bus/gpio/gpio_acpi/gpio_acpi.c

117

gpio->Triggering);

sys/bus/gpio/gpio_acpi/gpio_acpi.c

120

switch (gpio->Polarity) {

sys/bus/gpio/gpio_acpi/gpio_acpi.c

127

gpio->Polarity);

sys/bus/gpio/gpio_acpi/gpio_acpi.c

139

gpioio_alloc_pins(device_t dev, device_t provider, ACPI_RESOURCE_GPIO *gpio,

sys/bus/gpio/gpio_acpi/gpio_acpi.c

152

if (gpio->IoRestriction == ACPI_IO_RESTRICT_INPUT) {

sys/bus/gpio/gpio_acpi/gpio_acpi.c

154

} else if (gpio->IoRestriction ==

sys/bus/gpio/gpio_acpi/gpio_acpi.c

161

if (GPIO_ALLOC_IO_PIN(provider, gpio->PinTable[idx + i], flags,

sys/bus/gpio/gpio_acpi/gpio_acpi.c

164

"ResourceSource \"%s\"\n", gpio->PinTable[idx + i],

sys/bus/gpio/gpio_acpi/gpio_acpi.c

165

gpio->ResourceSource.StringPtr);

sys/bus/gpio/gpio_acpi/gpio_acpi.c

224

struct acpi_resource_gpio *gpio;

sys/bus/gpio/gpio_acpi/gpio_acpi.c

249

gpio = &Resource->Data.Gpio;

sys/bus/gpio/gpio_acpi/gpio_acpi.c

250

if (gpio->ConnectionType != ACPI_RESOURCE_GPIO_TYPE_IO) {

sys/bus/gpio/gpio_acpi/gpio_acpi.c

256

if (Address + BitWidth > gpio->PinTableLength) {

sys/bus/gpio/gpio_acpi/gpio_acpi.c

262

if (gpio->IoRestriction == ACPI_IO_RESTRICT_OUTPUT &&

sys/bus/gpio/gpio_acpi/gpio_acpi.c

269

if (gpio->IoRestriction == ACPI_IO_RESTRICT_INPUT &&

sys/bus/gpio/gpio_acpi/gpio_acpi.c

278

pins = gpioio_alloc_pins(dev, dev, gpio, Address, BitWidth, NULL);

sys/bus/gpio/gpio_acpi/gpio_acpi.c

355

gpio_acpi_do_map_aei(struct gpio_acpi_softc *sc, ACPI_RESOURCE_GPIO *gpio)

sys/bus/gpio/gpio_acpi/gpio_acpi.c

361

if (gpio->ConnectionType != ACPI_RESOURCE_GPIO_TYPE_INT) {

sys/bus/gpio/gpio_acpi/gpio_acpi.c

363

gpio->ConnectionType);

sys/bus/gpio/gpio_acpi/gpio_acpi.c

368

if (!gpio_acpi_check_gpioint(sc->dev, gpio))

sys/bus/gpio/gpio_acpi/gpio_acpi.c

371

pin = gpio->PinTable[0];

sys/bus/gpio/gpio_acpi/gpio_acpi.c

373

if (GPIO_ALLOC_INTR(sc->parent, pin, gpio->Triggering, gpio->Polarity,

sys/bus/gpio/gpio_acpi/gpio_acpi.c

374

gpio->PinConfig, &cookie) != 0) {

sys/bus/gpio/gpio_acpi/gpio_acpi.c

382

info->trigger = gpio->Triggering;

sys/bus/gpio/gpio_acpi/gpio_acpi.c

394

ACPI_RESOURCE_GPIO *gpio;

sys/bus/gpio/gpio_acpi/gpio_acpi.c

433

gpio = (ACPI_RESOURCE_GPIO *)&res->Data;

sys/bus/gpio/gpio_acpi/gpio_acpi.c

434

gpio_acpi_do_map_aei(sc, gpio);

sys/bus/gpio/gpio_acpi/gpio_acpi.c

78

static BOOLEAN gpio_acpi_check_gpioint(device_t dev, ACPI_RESOURCE_GPIO *gpio);

sys/bus/gpio/gpio_acpi/gpio_acpi.c

80

ACPI_RESOURCE_GPIO *gpio, uint16_t idx, uint16_t length,

sys/bus/gpio/gpio_acpi/gpio_acpi.c

95

ACPI_RESOURCE_GPIO *gpio);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

109

gpio = &i2c_info->asGPIO_Info[0];

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

112

amdgpu_atombios_lookup_i2c_gpio_quirks(adev, gpio, i);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

114

if (gpio->sucI2cId.ucAccess == id) {

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

115

i2c = amdgpu_atombios_get_bus_rec_for_i2c_gpio(gpio);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

118

gpio = (ATOM_GPIO_I2C_ASSIGMENT *)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

119

((u8 *)gpio + sizeof(ATOM_GPIO_I2C_ASSIGMENT));

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

129

ATOM_GPIO_I2C_ASSIGMENT *gpio;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

143

gpio = &i2c_info->asGPIO_Info[0];

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

145

amdgpu_atombios_lookup_i2c_gpio_quirks(adev, gpio, i);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

147

i2c = amdgpu_atombios_get_bus_rec_for_i2c_gpio(gpio);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

153

gpio = (ATOM_GPIO_I2C_ASSIGMENT *)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1536

ATOM_GPIO_VOLTAGE_OBJECT_V3 *gpio =

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1539

if (gpio->ucGpioEntryNum > MAX_VOLTAGE_ENTRIES)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

154

((u8 *)gpio + sizeof(ATOM_GPIO_I2C_ASSIGMENT));

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1541

lut = &gpio->asVolGpioLut[0];

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1542

for (i = 0; i < gpio->ucGpioEntryNum; i++) {

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1550

voltage_table->mask_low = le32_to_cpu(gpio->ulGpioMaskVal);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1551

voltage_table->count = gpio->ucGpioEntryNum;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

1552

voltage_table->phase_delay = gpio->ucPhaseDelay;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

164

struct amdgpu_gpio_rec gpio;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

171

memset(&gpio, 0, sizeof(struct amdgpu_gpio_rec));

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

172

gpio.valid = false;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

183

gpio.id = pin->ucGPIO_ID;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

184

gpio.reg = le16_to_cpu(pin->usGpioPin_AIndex);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

185

gpio.shift = pin->ucGpioPinBitShift;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

186

gpio.mask = (1 << pin->ucGpioPinBitShift);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

187

gpio.valid = true;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

195

return gpio;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

200

struct amdgpu_gpio_rec *gpio)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

209

hpd.gpio = *gpio;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

210

if (gpio->reg == reg) {

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

211

switch(gpio->mask) {

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

308

struct amdgpu_gpio_rec gpio;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

40

ATOM_GPIO_I2C_ASSIGMENT *gpio,

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

46

static struct amdgpu_i2c_bus_rec amdgpu_atombios_get_bus_rec_for_i2c_gpio(ATOM_GPIO_I2C_ASSIGMENT *gpio)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

52

i2c.mask_clk_reg = le16_to_cpu(gpio->usClkMaskRegisterIndex);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

526

gpio = amdgpu_atombios_lookup_gpio(adev,

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

528

hpd = amdgpu_atombios_get_hpd_info_from_gpio(adev, &gpio);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

53

i2c.mask_data_reg = le16_to_cpu(gpio->usDataMaskRegisterIndex);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

54

i2c.en_clk_reg = le16_to_cpu(gpio->usClkEnRegisterIndex);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

55

i2c.en_data_reg = le16_to_cpu(gpio->usDataEnRegisterIndex);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

56

i2c.y_clk_reg = le16_to_cpu(gpio->usClkY_RegisterIndex);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

57

i2c.y_data_reg = le16_to_cpu(gpio->usDataY_RegisterIndex);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

58

i2c.a_clk_reg = le16_to_cpu(gpio->usClkA_RegisterIndex);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

59

i2c.a_data_reg = le16_to_cpu(gpio->usDataA_RegisterIndex);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

60

i2c.mask_clk_mask = (1 << gpio->ucClkMaskShift);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

61

i2c.mask_data_mask = (1 << gpio->ucDataMaskShift);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

62

i2c.en_clk_mask = (1 << gpio->ucClkEnShift);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

63

i2c.en_data_mask = (1 << gpio->ucDataEnShift);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

64

i2c.y_clk_mask = (1 << gpio->ucClkY_Shift);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

65

i2c.y_data_mask = (1 << gpio->ucDataY_Shift);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

66

i2c.a_clk_mask = (1 << gpio->ucClkA_Shift);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

67

i2c.a_data_mask = (1 << gpio->ucDataA_Shift);

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

69

if (gpio->sucI2cId.sbfAccess.bfHW_Capable)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

74

if (gpio->sucI2cId.ucAccess == 0xa0)

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

79

i2c.i2c_id = gpio->sucI2cId.ucAccess;

sys/dev/drm/amd/amdgpu/amdgpu_atombios.c

93

ATOM_GPIO_I2C_ASSIGMENT *gpio;

sys/dev/drm/amd/amdgpu/amdgpu_mode.h

501

struct amdgpu_gpio_rec gpio;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5837

struct amdgpu_gpio_rec gpio;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5970

gpio = amdgpu_atombios_lookup_gpio(adev, VDDC_VRHOT_GPIO_PINID);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5971

if (gpio.valid) {

sys/dev/drm/amd/amdgpu/ci_dpm.c

5972

dpm_table->VRHotGpio = gpio.shift;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5979

gpio = amdgpu_atombios_lookup_gpio(adev, PP_AC_DC_SWITCH_GPIO_PINID);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5980

if (gpio.valid) {

sys/dev/drm/amd/amdgpu/ci_dpm.c

5981

dpm_table->AcDcGpio = gpio.shift;

sys/dev/drm/amd/amdgpu/ci_dpm.c

5988

gpio = amdgpu_atombios_lookup_gpio(adev, VDDC_PCC_GPIO_PINID);

sys/dev/drm/amd/amdgpu/ci_dpm.c

5989

if (gpio.valid) {

sys/dev/drm/amd/amdgpu/ci_dpm.c

5992

switch (gpio.shift) {

sys/dev/drm/amd/amdgpu/ci_dpm.c

6011

DRM_INFO("Invalid PCC GPIO: %u!\n", gpio.shift);

sys/dev/drm/amd/display/dc/core/dc_link.c

1076

struct gpio *hpd_gpio = NULL;

sys/dev/drm/amd/display/dc/core/dc_link.c

138

struct gpio *hpd;

sys/dev/drm/amd/display/dc/core/dc_link.c

204

struct gpio *hpd_pin;

sys/dev/drm/amd/display/dc/core/dc_link.c

2672

struct gpio *hpd;

sys/dev/drm/amd/display/dc/core/dc_link.c

909

struct gpio *hpd_pin;

sys/dev/drm/amd/display/dc/core/dc_link.c

928

struct gpio *hpd;

sys/dev/drm/amd/display/dc/core/dc_link.c

96

struct gpio *get_hpd_gpio(struct dc_bios *dcb,

sys/dev/drm/amd/display/dc/dc_ddc_types.h

117

struct gpio *pin_data;

sys/dev/drm/amd/display/dc/dc_ddc_types.h

118

struct gpio *pin_clock;

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

787

struct gpio *hpd;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c

119

ddc->base.regs = &ddc_data_regs[en].gpio;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c

123

ddc->base.regs = &ddc_clk_regs[en].gpio;

sys/dev/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c

142

hpd->base.regs = &hpd_regs[en].gpio;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

138

ddc->base.regs = &ddc_data_regs[en].gpio;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

142

ddc->base.regs = &ddc_clk_regs[en].gpio;

sys/dev/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

161

hpd->base.regs = &hpd_regs[en].gpio;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c

123

ddc->base.regs = &ddc_data_regs[en].gpio;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c

127

ddc->base.regs = &ddc_clk_regs[en].gpio;

sys/dev/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c

146

hpd->base.regs = &hpd_regs[en].gpio;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

133

ddc->base.regs = &ddc_data_regs[en].gpio;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

137

ddc->base.regs = &ddc_clk_regs[en].gpio;

sys/dev/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

156

hpd->base.regs = &hpd_regs[en].gpio;

sys/dev/drm/amd/display/dc/gpio/ddc_regs.h

100

struct gpio_registers gpio;

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

101

return gpio->mode;

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

105

struct gpio *gpio,

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

108

if (!gpio->pin) {

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

113

return gpio->pin->funcs->change_mode(gpio->pin, mode);

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

117

const struct gpio *gpio)

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

119

return gpio->id;

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

123

const struct gpio *gpio)

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

125

return gpio->en;

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

129

struct gpio *gpio,

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

132

if (!gpio->pin) {

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

137

return gpio->pin->funcs->set_config(gpio->pin, config_data);

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

141

const struct gpio *gpio,

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

144

return gpio->service->translate.funcs->id_to_offset(

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

145

gpio->id, gpio->en, pin_info) ?

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

150

const struct gpio *gpio)

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

152

switch (gpio->id) {

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

154

switch (gpio->en) {

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

172

switch (gpio->en) {

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

186

switch (gpio->en) {

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

196

switch (gpio->en) {

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

215

const struct gpio *gpio)

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

217

return gpio->output_state;

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

221

struct gpio *gpio)

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

223

if (!gpio)

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

226

dal_gpio_service_close(gpio->service, &gpio->pin);

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

228

gpio->mode = GPIO_MODE_UNKNOWN;

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

236

struct gpio *dal_gpio_create(

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

242

struct gpio *gpio = kzalloc(sizeof(struct gpio), GFP_KERNEL);

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

244

if (!gpio) {

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

249

gpio->service = service;

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

250

gpio->pin = NULL;

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

251

gpio->id = id;

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

252

gpio->en = en;

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

253

gpio->mode = GPIO_MODE_UNKNOWN;

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

254

gpio->output_state = output_state;

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

256

return gpio;

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

260

struct gpio **gpio)

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

262

if (!gpio || !*gpio) {

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

267

dal_gpio_close(*gpio);

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

269

kfree(*gpio);

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

271

*gpio = NULL;

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

53

struct gpio *gpio,

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

56

return dal_gpio_open_ex(gpio, mode);

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

60

struct gpio *gpio,

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

63

if (gpio->pin) {

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

68

gpio->mode = mode;

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

71

gpio->service, gpio->id, gpio->en, mode, &gpio->pin);

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

75

const struct gpio *gpio,

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

78

if (!gpio->pin) {

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

83

return gpio->pin->funcs->get_value(gpio->pin, value);

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

87

const struct gpio *gpio,

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

90

if (!gpio->pin) {

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

95

return gpio->pin->funcs->set_value(gpio->pin, value);

sys/dev/drm/amd/display/dc/gpio/gpio_base.c

99

const struct gpio *gpio)

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

143

struct gpio *dal_gpio_service_create_irq(

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

316

const struct gpio *irq)

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

333

const struct gpio *irq)

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

347

struct gpio *irq,

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

366

struct gpio *dal_gpio_create_irq(

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

371

struct gpio *irq;

sys/dev/drm/amd/display/dc/gpio/gpio_service.c

394

struct gpio **irq)

sys/dev/drm/amd/display/dc/gpio/hpd_regs.h

64

struct gpio_registers gpio;

sys/dev/drm/amd/display/dc/gpio/hw_ddc.c

108

reg2 = REG_GET_2(gpio.MASK_reg,

sys/dev/drm/amd/display/dc/gpio/hw_ddc.c

113

REG_SET(gpio.MASK_reg, regval,

sys/dev/drm/amd/display/dc/gpio/hw_ddc.c

122

REG_SET(gpio.MASK_reg, regval,

sys/dev/drm/amd/display/dc/gpio/hw_ddc.c

143

REG_UPDATE(gpio.MASK_reg,

sys/dev/drm/amd/display/dc/gpio/hw_ddc.c

151

REG_SET(gpio.MASK_reg, regval,

sys/dev/drm/amd/display/dc/gpio/hw_ddc.c

81

regval = REG_GET_3(gpio.MASK_reg,

sys/dev/drm/amd/display/dc/gpio/hw_ddc.c

95

REG_SET_2(gpio.MASK_reg, regval,

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

142

struct hw_gpio *gpio,

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

145

gpio->base.mode = mode;

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

35

gpio->regs->field_name ## _shift, gpio->regs->field_name ## _mask

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

38

gpio->base.ctx

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

40

(gpio->regs->reg)

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

43

struct hw_gpio *gpio)

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

45

REG_GET(MASK_reg, MASK, &gpio->store.mask);

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

46

REG_GET(A_reg, A, &gpio->store.a);

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

47

REG_GET(EN_reg, EN, &gpio->store.en);

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

52

struct hw_gpio *gpio)

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

54

REG_UPDATE(MASK_reg, MASK, gpio->store.mask);

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

55

REG_UPDATE(A_reg, A, gpio->store.a);

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

56

REG_UPDATE(EN_reg, EN, gpio->store.en);

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

77

const struct hw_gpio *gpio = FROM_HW_GPIO_PIN(ptr);

sys/dev/drm/amd/display/dc/gpio/hw_gpio.c

99

struct hw_gpio *gpio = FROM_HW_GPIO_PIN(ptr);

sys/dev/drm/amd/display/dc/inc/link_hwss.h

43

struct gpio *get_hpd_gpio(struct dc_bios *dcb,

sys/dev/drm/amd/display/include/gpio_interface.h

32

struct gpio;

sys/dev/drm/amd/display/include/gpio_interface.h

36

struct gpio *gpio,

sys/dev/drm/amd/display/include/gpio_interface.h

40

struct gpio *gpio,

sys/dev/drm/amd/display/include/gpio_interface.h

45

const struct gpio *gpio,

sys/dev/drm/amd/display/include/gpio_interface.h

50

const struct gpio *gpio,

sys/dev/drm/amd/display/include/gpio_interface.h

55

const struct gpio *gpio);

sys/dev/drm/amd/display/include/gpio_interface.h

59

struct gpio *gpio,

sys/dev/drm/amd/display/include/gpio_interface.h

64

const struct gpio *gpio);

sys/dev/drm/amd/display/include/gpio_interface.h

68

const struct gpio *gpio);

sys/dev/drm/amd/display/include/gpio_interface.h

72

struct gpio *gpio,

sys/dev/drm/amd/display/include/gpio_interface.h

77

const struct gpio *gpio,

sys/dev/drm/amd/display/include/gpio_interface.h

82

const struct gpio *gpio);

sys/dev/drm/amd/display/include/gpio_interface.h

86

const struct gpio *gpio);

sys/dev/drm/amd/display/include/gpio_interface.h

90

struct gpio *gpio);

sys/dev/drm/amd/display/include/gpio_service_interface.h

35

struct gpio *dal_gpio_create(

sys/dev/drm/amd/display/include/gpio_service_interface.h

42

struct gpio **ptr);

sys/dev/drm/amd/display/include/gpio_service_interface.h

49

struct gpio *dal_gpio_service_create_irq(

sys/dev/drm/amd/display/include/gpio_service_interface.h

68

const struct gpio *irq);

sys/dev/drm/amd/display/include/gpio_service_interface.h

71

const struct gpio *irq);

sys/dev/drm/amd/display/include/gpio_service_interface.h

74

struct gpio *irq,

sys/dev/drm/amd/display/include/gpio_service_interface.h

77

struct gpio *dal_gpio_create_irq(

sys/dev/drm/amd/display/include/gpio_service_interface.h

83

struct gpio **ptr);

sys/dev/drm/amd/include/atomfirmware.h

721

struct atom_gpio_pin_control_pair gpio[1]; // the real gpio pin pair determined by number of pins ucNumberOfPins

sys/dev/drm/i915/dvo.h

38

u32 gpio;

sys/dev/drm/i915/i915_reg.h

3091

#define GPIO(gpio) _MMIO(dev_priv->gpio_mmio_base + 0x5010 + \

sys/dev/drm/i915/i915_reg.h

3092

4 * (gpio))

sys/dev/drm/i915/intel_dvo.c

438

int gpio;

sys/dev/drm/i915/intel_dvo.c

449

if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))

sys/dev/drm/i915/intel_dvo.c

450

gpio = dvo->gpio;

sys/dev/drm/i915/intel_dvo.c

452

gpio = GMBUS_PIN_SSC;

sys/dev/drm/i915/intel_dvo.c

454

gpio = GMBUS_PIN_DPB;

sys/dev/drm/i915/intel_dvo.c

461

i2c = intel_gmbus_get_adapter(dev_priv, gpio);

sys/dev/drm/i915/intel_dvo.c

89

.gpio = GMBUS_PIN_DPB,

sys/dev/drm/i915/intel_i2c.c

294

bus->gpio_reg = GPIO(get_gmbus_pin(dev_priv, pin)->gpio);

sys/dev/drm/i915/intel_i2c.c

40

enum i915_gpio gpio;

sys/dev/drm/radeon/ci_dpm.c

5720

struct radeon_gpio_rec gpio;

sys/dev/drm/radeon/ci_dpm.c

5871

gpio = radeon_atombios_lookup_gpio(rdev, VDDC_VRHOT_GPIO_PINID);

sys/dev/drm/radeon/ci_dpm.c

5872

if (gpio.valid) {

sys/dev/drm/radeon/ci_dpm.c

5873

dpm_table->VRHotGpio = gpio.shift;

sys/dev/drm/radeon/ci_dpm.c

5880

gpio = radeon_atombios_lookup_gpio(rdev, PP_AC_DC_SWITCH_GPIO_PINID);

sys/dev/drm/radeon/ci_dpm.c

5881

if (gpio.valid) {

sys/dev/drm/radeon/ci_dpm.c

5882

dpm_table->AcDcGpio = gpio.shift;

sys/dev/drm/radeon/ci_dpm.c

5889

gpio = radeon_atombios_lookup_gpio(rdev, VDDC_PCC_GPIO_PINID);

sys/dev/drm/radeon/ci_dpm.c

5890

if (gpio.valid) {

sys/dev/drm/radeon/ci_dpm.c

5893

switch (gpio.shift) {

sys/dev/drm/radeon/ci_dpm.c

5912

DRM_DEBUG("Invalid PCC GPIO: %u!\n", gpio.shift);

sys/dev/drm/radeon/r100.c

352

if ((voltage->type == VOLTAGE_GPIO) && (voltage->gpio.valid)) {

sys/dev/drm/radeon/r100.c

354

tmp = RREG32(voltage->gpio.reg);

sys/dev/drm/radeon/r100.c

356

tmp |= voltage->gpio.mask;

sys/dev/drm/radeon/r100.c

358

tmp &= ~(voltage->gpio.mask);

sys/dev/drm/radeon/r100.c

359

WREG32(voltage->gpio.reg, tmp);

sys/dev/drm/radeon/r100.c

363

tmp = RREG32(voltage->gpio.reg);

sys/dev/drm/radeon/r100.c

365

tmp &= ~voltage->gpio.mask;

sys/dev/drm/radeon/r100.c

367

tmp |= voltage->gpio.mask;

sys/dev/drm/radeon/r100.c

368

WREG32(voltage->gpio.reg, tmp);

sys/dev/drm/radeon/r600_dpm.c

547

u32 gpio;

sys/dev/drm/radeon/r600_dpm.c

549

gpio = RREG32(GPIOPAD_MASK);

sys/dev/drm/radeon/r600_dpm.c

550

gpio &= ~mask;

sys/dev/drm/radeon/r600_dpm.c

551

WREG32(GPIOPAD_MASK, gpio);

sys/dev/drm/radeon/r600_dpm.c

553

gpio = RREG32(GPIOPAD_EN);

sys/dev/drm/radeon/r600_dpm.c

554

gpio &= ~mask;

sys/dev/drm/radeon/r600_dpm.c

555

WREG32(GPIOPAD_EN, gpio);

sys/dev/drm/radeon/r600_dpm.c

557

gpio = RREG32(GPIOPAD_A);

sys/dev/drm/radeon/r600_dpm.c

558

gpio &= ~mask;

sys/dev/drm/radeon/r600_dpm.c

559

WREG32(GPIOPAD_A, gpio);

sys/dev/drm/radeon/radeon.h

1270

struct radeon_gpio_rec gpio;

sys/dev/drm/radeon/radeon_atombios.c

101

if (gpio->sucI2cId.sbfAccess.bfHW_Capable)

sys/dev/drm/radeon/radeon_atombios.c

106

if (gpio->sucI2cId.ucAccess == 0xa0)

sys/dev/drm/radeon/radeon_atombios.c

111

i2c.i2c_id = gpio->sucI2cId.ucAccess;

sys/dev/drm/radeon/radeon_atombios.c

125

ATOM_GPIO_I2C_ASSIGMENT *gpio;

sys/dev/drm/radeon/radeon_atombios.c

141

gpio = &i2c_info->asGPIO_Info[0];

sys/dev/drm/radeon/radeon_atombios.c

144

radeon_lookup_i2c_gpio_quirks(rdev, gpio, i);

sys/dev/drm/radeon/radeon_atombios.c

146

if (gpio->sucI2cId.ucAccess == id) {

sys/dev/drm/radeon/radeon_atombios.c

147

i2c = radeon_get_bus_rec_for_i2c_gpio(gpio);

sys/dev/drm/radeon/radeon_atombios.c

150

gpio = (ATOM_GPIO_I2C_ASSIGMENT *)

sys/dev/drm/radeon/radeon_atombios.c

151

((u8 *)gpio + sizeof(ATOM_GPIO_I2C_ASSIGMENT));

sys/dev/drm/radeon/radeon_atombios.c

161

ATOM_GPIO_I2C_ASSIGMENT *gpio;

sys/dev/drm/radeon/radeon_atombios.c

175

gpio = &i2c_info->asGPIO_Info[0];

sys/dev/drm/radeon/radeon_atombios.c

177

radeon_lookup_i2c_gpio_quirks(rdev, gpio, i);

sys/dev/drm/radeon/radeon_atombios.c

179

i2c = radeon_get_bus_rec_for_i2c_gpio(gpio);

sys/dev/drm/radeon/radeon_atombios.c

185

gpio = (ATOM_GPIO_I2C_ASSIGMENT *)

sys/dev/drm/radeon/radeon_atombios.c

186

((u8 *)gpio + sizeof(ATOM_GPIO_I2C_ASSIGMENT));

sys/dev/drm/radeon/radeon_atombios.c

195

struct radeon_gpio_rec gpio;

sys/dev/drm/radeon/radeon_atombios.c

202

memset(&gpio, 0, sizeof(struct radeon_gpio_rec));

sys/dev/drm/radeon/radeon_atombios.c

203

gpio.valid = false;

sys/dev/drm/radeon/radeon_atombios.c

214

gpio.id = pin->ucGPIO_ID;

sys/dev/drm/radeon/radeon_atombios.c

215

gpio.reg = le16_to_cpu(pin->usGpioPin_AIndex) * 4;

sys/dev/drm/radeon/radeon_atombios.c

2152

rdev->pm.power_state[state_index].clock_info[0].voltage.gpio =

sys/dev/drm/radeon/radeon_atombios.c

216

gpio.shift = pin->ucGpioPinBitShift;

sys/dev/drm/radeon/radeon_atombios.c

217

gpio.mask = (1 << pin->ucGpioPinBitShift);

sys/dev/drm/radeon/radeon_atombios.c

218

gpio.valid = true;

sys/dev/drm/radeon/radeon_atombios.c

2188

rdev->pm.power_state[state_index].clock_info[0].voltage.gpio =

sys/dev/drm/radeon/radeon_atombios.c

2224

rdev->pm.power_state[state_index].clock_info[0].voltage.gpio =

sys/dev/drm/radeon/radeon_atombios.c

226

return gpio;

sys/dev/drm/radeon/radeon_atombios.c

230

struct radeon_gpio_rec *gpio)

sys/dev/drm/radeon/radeon_atombios.c

244

hpd.gpio = *gpio;

sys/dev/drm/radeon/radeon_atombios.c

245

if (gpio->reg == reg) {

sys/dev/drm/radeon/radeon_atombios.c

246

switch(gpio->mask) {

sys/dev/drm/radeon/radeon_atombios.c

3774

ATOM_GPIO_VOLTAGE_OBJECT_V3 *gpio =

sys/dev/drm/radeon/radeon_atombios.c

3777

if (gpio->ucGpioEntryNum > MAX_VOLTAGE_ENTRIES)

sys/dev/drm/radeon/radeon_atombios.c

3779

lut = &gpio->asVolGpioLut[0];

sys/dev/drm/radeon/radeon_atombios.c

3780

for (i = 0; i < gpio->ucGpioEntryNum; i++) {

sys/dev/drm/radeon/radeon_atombios.c

3788

voltage_table->mask_low = le32_to_cpu(gpio->ulGpioMaskVal);

sys/dev/drm/radeon/radeon_atombios.c

3789

voltage_table->count = gpio->ucGpioEntryNum;

sys/dev/drm/radeon/radeon_atombios.c

3790

voltage_table->phase_delay = gpio->ucPhaseDelay;

sys/dev/drm/radeon/radeon_atombios.c

41

ATOM_GPIO_I2C_ASSIGMENT *gpio,

sys/dev/drm/radeon/radeon_atombios.c

48

if ((le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0018) ||

sys/dev/drm/radeon/radeon_atombios.c

49

(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0019) ||

sys/dev/drm/radeon/radeon_atombios.c

50

(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x001a)) {

sys/dev/drm/radeon/radeon_atombios.c

51

gpio->ucClkMaskShift = 0x19;

sys/dev/drm/radeon/radeon_atombios.c

52

gpio->ucDataMaskShift = 0x18;

sys/dev/drm/radeon/radeon_atombios.c

527

struct radeon_gpio_rec gpio;

sys/dev/drm/radeon/radeon_atombios.c

59

(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1936) &&

sys/dev/drm/radeon/radeon_atombios.c

60

(gpio->sucI2cId.ucAccess == 0)) {

sys/dev/drm/radeon/radeon_atombios.c

61

gpio->sucI2cId.ucAccess = 0x97;

sys/dev/drm/radeon/radeon_atombios.c

62

gpio->ucDataMaskShift = 8;

sys/dev/drm/radeon/radeon_atombios.c

63

gpio->ucDataEnShift = 8;

sys/dev/drm/radeon/radeon_atombios.c

64

gpio->ucDataY_Shift = 8;

sys/dev/drm/radeon/radeon_atombios.c

65

gpio->ucDataA_Shift = 8;

sys/dev/drm/radeon/radeon_atombios.c

72

(le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1fda) &&

sys/dev/drm/radeon/radeon_atombios.c

73

(gpio->sucI2cId.ucAccess == 0x94))

sys/dev/drm/radeon/radeon_atombios.c

74

gpio->sucI2cId.ucAccess = 0x14;

sys/dev/drm/radeon/radeon_atombios.c

78

static struct radeon_i2c_bus_rec radeon_get_bus_rec_for_i2c_gpio(ATOM_GPIO_I2C_ASSIGMENT *gpio)

sys/dev/drm/radeon/radeon_atombios.c

791

gpio = radeon_atombios_lookup_gpio(rdev,

sys/dev/drm/radeon/radeon_atombios.c

793

hpd = radeon_atom_get_hpd_info_from_gpio(rdev, &gpio);

sys/dev/drm/radeon/radeon_atombios.c

84

i2c.mask_clk_reg = le16_to_cpu(gpio->usClkMaskRegisterIndex) * 4;

sys/dev/drm/radeon/radeon_atombios.c

85

i2c.mask_data_reg = le16_to_cpu(gpio->usDataMaskRegisterIndex) * 4;

sys/dev/drm/radeon/radeon_atombios.c

86

i2c.en_clk_reg = le16_to_cpu(gpio->usClkEnRegisterIndex) * 4;

sys/dev/drm/radeon/radeon_atombios.c

87

i2c.en_data_reg = le16_to_cpu(gpio->usDataEnRegisterIndex) * 4;

sys/dev/drm/radeon/radeon_atombios.c

88

i2c.y_clk_reg = le16_to_cpu(gpio->usClkY_RegisterIndex) * 4;

sys/dev/drm/radeon/radeon_atombios.c

89

i2c.y_data_reg = le16_to_cpu(gpio->usDataY_RegisterIndex) * 4;

sys/dev/drm/radeon/radeon_atombios.c

90

i2c.a_clk_reg = le16_to_cpu(gpio->usClkA_RegisterIndex) * 4;

sys/dev/drm/radeon/radeon_atombios.c

91

i2c.a_data_reg = le16_to_cpu(gpio->usDataA_RegisterIndex) * 4;

sys/dev/drm/radeon/radeon_atombios.c

92

i2c.mask_clk_mask = (1 << gpio->ucClkMaskShift);

sys/dev/drm/radeon/radeon_atombios.c

93

i2c.mask_data_mask = (1 << gpio->ucDataMaskShift);

sys/dev/drm/radeon/radeon_atombios.c

94

i2c.en_clk_mask = (1 << gpio->ucClkEnShift);

sys/dev/drm/radeon/radeon_atombios.c

95

i2c.en_data_mask = (1 << gpio->ucDataEnShift);

sys/dev/drm/radeon/radeon_atombios.c

96

i2c.y_clk_mask = (1 << gpio->ucClkY_Shift);

sys/dev/drm/radeon/radeon_atombios.c

97

i2c.y_data_mask = (1 << gpio->ucDataY_Shift);

sys/dev/drm/radeon/radeon_atombios.c

98

i2c.a_clk_mask = (1 << gpio->ucClkA_Shift);

sys/dev/drm/radeon/radeon_atombios.c

99

i2c.a_data_mask = (1 << gpio->ucDataA_Shift);

sys/dev/drm/radeon/radeon_combios.c

1410

enum radeon_combios_ddc gpio;

sys/dev/drm/radeon/radeon_combios.c

1426

gpio = RBIOS8(offset + 4 + 3);

sys/dev/drm/radeon/radeon_combios.c

1427

if (gpio == DDC_LCD) {

sys/dev/drm/radeon/radeon_combios.c

1434

i2c_bus = combios_setup_i2c_bus(rdev, gpio, 0, 0);

sys/dev/drm/radeon/radeon_combios.c

2657

u8 thermal_controller = 0, gpio = 0, i2c_addr = 0, clk_bit = 0, data_bit = 0;

sys/dev/drm/radeon/radeon_combios.c

2663

gpio = RBIOS8(offset + 4) & 0x3f;

sys/dev/drm/radeon/radeon_combios.c

2667

gpio = RBIOS8(offset + 5) & 0x3f;

sys/dev/drm/radeon/radeon_combios.c

2671

gpio = RBIOS8(offset + 5) & 0x3f;

sys/dev/drm/radeon/radeon_combios.c

2680

if (gpio == DDC_LCD) {

sys/dev/drm/radeon/radeon_combios.c

2686

} else if (gpio == DDC_GPIO)

sys/dev/drm/radeon/radeon_combios.c

2687

i2c_bus = combios_setup_i2c_bus(rdev, gpio, 1 << clk_bit, 1 << data_bit);

sys/dev/drm/radeon/radeon_combios.c

2689

i2c_bus = combios_setup_i2c_bus(rdev, gpio, 0, 0);

sys/dev/drm/radeon/radeon_combios.c

2747

rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.valid = true;

sys/dev/drm/radeon/radeon_combios.c

2749

rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.reg =

sys/dev/drm/radeon/radeon_combios.c

2752

rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.mask = (1 << tmp);

sys/dev/drm/radeon/radeon_combios.c

2757

rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.reg =

sys/dev/drm/radeon/radeon_combios.c

2760

rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.mask = (1 << tmp);

sys/dev/drm/radeon/radeon_combios.c

2762

rdev->pm.power_state[state_index].clock_info[0].voltage.gpio.valid = false;

sys/dev/drm/radeon/radeon_mode.h

509

struct radeon_gpio_rec gpio;

sys/dev/drm/radeon/rs600.c

224

if ((voltage->type == VOLTAGE_GPIO) && (voltage->gpio.valid)) {

sys/dev/drm/radeon/rs600.c

226

tmp = RREG32(voltage->gpio.reg);

sys/dev/drm/radeon/rs600.c

228

tmp |= voltage->gpio.mask;

sys/dev/drm/radeon/rs600.c

230

tmp &= ~(voltage->gpio.mask);

sys/dev/drm/radeon/rs600.c

231

WREG32(voltage->gpio.reg, tmp);

sys/dev/drm/radeon/rs600.c

235

tmp = RREG32(voltage->gpio.reg);

sys/dev/drm/radeon/rs600.c

237

tmp &= ~voltage->gpio.mask;

sys/dev/drm/radeon/rs600.c

239

tmp |= voltage->gpio.mask;

sys/dev/drm/radeon/rs600.c

240

WREG32(voltage->gpio.reg, tmp);

sys/dev/misc/gpio/gpio.c

141

gpio_consumer_detach(const char *consumer, struct gpio *gp,

sys/dev/misc/gpio/gpio.c

183

gpio_map(struct gpio *gp, int *map, int offset, u_int32_t mask)

sys/dev/misc/gpio/gpio.c

275

gpio_pin_read(struct gpio *gp, struct gpio_mapping *map, int pin)

sys/dev/misc/gpio/gpio.c

281

gpio_pin_write(struct gpio *gp, struct gpio_mapping *map, int pin, int data)

sys/dev/misc/gpio/gpio.c

287

gpio_pin_ctl(struct gpio *gp, struct gpio_mapping *map, int pin, int flags)

sys/dev/misc/gpio/gpio.c

293

gpio_pin_caps(struct gpio *gp, struct gpio_mapping *map, int pin)

sys/dev/misc/gpio/gpio.c

339

struct gpio *gp;

sys/dev/misc/gpio/gpio.c

370

struct gpio *gp;

sys/dev/misc/gpio/gpio.c

398

struct gpio *gp;

sys/dev/misc/gpio/gpio.c

451

struct gpio *gp;

sys/dev/misc/gpio/gpio.c

543

gpio_register(struct gpio *gp)

sys/dev/misc/gpio/gpio.c

573

unit = devfs_clone_bitmap_get(&DEVFS_CLONE_BITMAP(gpio), 0);

sys/dev/misc/gpio/gpio.c

579

unit = devfs_clone_bitmap_get(&DEVFS_CLONE_BITMAP(gpio), 0);

sys/dev/misc/gpio/gpio.c

588

gpio_unregister(struct gpio *gp)

sys/dev/misc/gpio/gpio.c

597

devfs_clone_bitmap_get(&DEVFS_CLONE_BITMAP(gpio),

sys/dev/misc/gpio/gpio.c

624

devfs_clone_bitmap_init(&DEVFS_CLONE_BITMAP(gpio));

sys/dev/misc/gpio/gpio.c

627

SYSINIT(gpio, SI_SUB_PRE_DRIVERS, SI_ORDER_FIRST, gpio_drvinit, NULL);

sys/dev/misc/gpio/gpio.c

78

DEVFS_DEFINE_CLONE_BITMAP(gpio);

sys/dev/misc/gpio/gpio.c

99

gpio_consumer_attach(const char *consumer, void *arg, struct gpio *gp,

sys/dev/misc/gpio/gpio.h

103

int (*consumer_attach)(struct gpio *, void *, int, u_int32_t);

sys/dev/misc/gpio/gpio.h

104

int (*consumer_detach)(struct gpio *, void *, int);

sys/dev/misc/gpio/gpio.h

131

struct gpio *gp;

sys/dev/misc/gpio/gpio.h

140

int gpio_consumer_attach(const char *consumer, void *arg, struct gpio *gp,

sys/dev/misc/gpio/gpio.h

142

int gpio_consumer_detach(const char *consumer, struct gpio *gp, int pin);

sys/dev/misc/gpio/gpio.h

143

struct gpio_mapping *gpio_map(struct gpio *gp, int *map, int offset, u_int32_t mask);

sys/dev/misc/gpio/gpio.h

147

int gpio_pin_read(struct gpio *gp, struct gpio_mapping *map, int pin);

sys/dev/misc/gpio/gpio.h

148

void gpio_pin_write(struct gpio *gp, struct gpio_mapping *map, int pin, int data);

sys/dev/misc/gpio/gpio.h

149

void gpio_pin_ctl(struct gpio *gp, struct gpio_mapping *map, int pin, int flags);

sys/dev/misc/gpio/gpio.h

150

int gpio_pin_caps(struct gpio *gp, struct gpio_mapping *map, int pin);

sys/dev/misc/gpio/gpio.h

151

void gpio_register(struct gpio *gp);

sys/dev/misc/gpio/gpio.h

152

void gpio_unregister(struct gpio *gp);

sys/dev/misc/gpio/gpio_led.c

182

led_attach(struct gpio *gp, void *arg, int pin, u_int32_t mask)

sys/dev/misc/gpio/gpio_led.c

218

led_detach(struct gpio *gp, void *arg, int pin)

sys/dev/misc/gpio/gpio_led.c

51

struct gpio *gp;

sys/dev/misc/nsclpcsio/nsclpcsio_isa.c

179

struct gpio sc_gpio_gc;

sys/dev/netif/ath/ath_hal/ah.h

1478

uint32_t gpio, HAL_GPIO_MUX_TYPE);

sys/dev/netif/ath/ath_hal/ah.h

1479

HAL_BOOL __ahdecl(*ah_gpioCfgInput)(struct ath_hal *, uint32_t gpio);

sys/dev/netif/ath/ath_hal/ah.h

1480

uint32_t __ahdecl(*ah_gpioGet)(struct ath_hal *, uint32_t gpio);

sys/dev/netif/ath/ath_hal/ah.h

1482

uint32_t gpio, uint32_t val);

sys/dev/netif/ath/ath_hal/ar5210/ar5210.h

220

extern HAL_BOOL ar5210GpioCfgInput(struct ath_hal *, uint32_t gpio);

sys/dev/netif/ath/ath_hal/ar5210/ar5210.h

221

extern HAL_BOOL ar5210GpioCfgOutput(struct ath_hal *, uint32_t gpio,

sys/dev/netif/ath/ath_hal/ar5210/ar5210.h

223

extern uint32_t ar5210GpioGet(struct ath_hal *, uint32_t gpio);

sys/dev/netif/ath/ath_hal/ar5210/ar5210.h

224

extern HAL_BOOL ar5210GpioSet(struct ath_hal *, uint32_t gpio, uint32_t);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

161

ar5210GpioCfgOutput(struct ath_hal *ah, uint32_t gpio, HAL_GPIO_MUX_TYPE type)

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

163

HALASSERT(gpio < AR_NUM_GPIO);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

166

(OS_REG_READ(ah, AR_GPIOCR) &~ AR_GPIOCR_ALL(gpio))

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

167

| AR_GPIOCR_OUT1(gpio));

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

176

ar5210GpioCfgInput(struct ath_hal *ah, uint32_t gpio)

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

178

HALASSERT(gpio < AR_NUM_GPIO);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

181

(OS_REG_READ(ah, AR_GPIOCR) &~ AR_GPIOCR_ALL(gpio))

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

182

| AR_GPIOCR_IN(gpio));

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

191

ar5210GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

195

HALASSERT(gpio < AR_NUM_GPIO);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

198

reg &= ~(1 << gpio);

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

199

reg |= (val&1) << gpio;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

209

ar5210GpioGet(struct ath_hal *ah, uint32_t gpio)

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

211

if (gpio < AR_NUM_GPIO) {

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

213

val = ((val & AR_GPIOD_MASK) >> gpio) & 0x1;

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

224

ar5210Gpio0SetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel)

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

229

val &= ~(AR_GPIOCR_INT_SEL(gpio) | AR_GPIOCR_INT_SELH | AR_GPIOCR_INT_ENA |

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

230

AR_GPIOCR_ALL(gpio));

sys/dev/netif/ath/ath_hal/ar5210/ar5210_misc.c

232

val |= AR_GPIOCR_INT_SEL(gpio) | AR_GPIOCR_INT_ENA;

sys/dev/netif/ath/ath_hal/ar5211/ar5211.h

243

extern uint32_t ar5211GpioGet(struct ath_hal *, uint32_t gpio);

sys/dev/netif/ath/ath_hal/ar5211/ar5211.h

245

extern HAL_BOOL ar5211GpioCfgOutput(struct ath_hal *, uint32_t gpio,

sys/dev/netif/ath/ath_hal/ar5211/ar5211.h

247

extern HAL_BOOL ar5211GpioCfgInput(struct ath_hal *, uint32_t gpio);

sys/dev/netif/ath/ath_hal/ar5211/ar5211.h

248

extern HAL_BOOL ar5211GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

195

ar5211GpioCfgOutput(struct ath_hal *ah, uint32_t gpio, HAL_GPIO_MUX_TYPE type)

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

199

HALASSERT(gpio < AR_NUM_GPIO);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

202

reg &= ~(AR_GPIOCR_0_CR_A << (gpio * AR_GPIOCR_CR_SHIFT));

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

203

reg |= AR_GPIOCR_0_CR_A << (gpio * AR_GPIOCR_CR_SHIFT);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

213

ar5211GpioCfgInput(struct ath_hal *ah, uint32_t gpio)

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

217

HALASSERT(gpio < AR_NUM_GPIO);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

220

reg &= ~(AR_GPIOCR_0_CR_A << (gpio * AR_GPIOCR_CR_SHIFT));

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

221

reg |= AR_GPIOCR_0_CR_N << (gpio * AR_GPIOCR_CR_SHIFT);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

231

ar5211GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

235

HALASSERT(gpio < AR_NUM_GPIO);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

238

reg &= ~(1 << gpio);

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

239

reg |= (val&1) << gpio;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

249

ar5211GpioGet(struct ath_hal *ah, uint32_t gpio)

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

251

if (gpio < AR_NUM_GPIO) {

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

253

val = ((val & AR_GPIOD_MASK) >> gpio) & 0x1;

sys/dev/netif/ath/ath_hal/ar5211/ar5211_misc.c

264

ar5211GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel)

sys/dev/netif/ath/ath_hal/ar5212/ar5212.h

473

extern HAL_BOOL ar5212GpioCfgOutput(struct ath_hal *, uint32_t gpio,

sys/dev/netif/ath/ath_hal/ar5212/ar5212.h

475

extern HAL_BOOL ar5212GpioCfgInput(struct ath_hal *, uint32_t gpio);

sys/dev/netif/ath/ath_hal/ar5212/ar5212.h

476

extern HAL_BOOL ar5212GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val);

sys/dev/netif/ath/ath_hal/ar5212/ar5212.h

477

extern uint32_t ar5212GpioGet(struct ath_hal *ah, uint32_t gpio);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

105

ar5212GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel)

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

111

val &= ~(AR_GPIOCR_CR_A(gpio) |

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

113

val |= AR_GPIOCR_CR_N(gpio) | AR_GPIOCR_INT(gpio) | AR_GPIOCR_INT_ENA;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

39

ar5212GpioCfgOutput(struct ath_hal *ah, uint32_t gpio, HAL_GPIO_MUX_TYPE type)

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

41

HALASSERT(gpio < AR_NUM_GPIO);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

48

OS_REG_READ(ah, AR_GPIOCR) | AR_GPIOCR_CR_A(gpio));

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

57

ar5212GpioCfgInput(struct ath_hal *ah, uint32_t gpio)

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

59

HALASSERT(gpio < AR_NUM_GPIO);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

62

(OS_REG_READ(ah, AR_GPIOCR) &~ AR_GPIOCR_CR_A(gpio))

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

63

| AR_GPIOCR_CR_N(gpio));

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

72

ar5212GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

76

HALASSERT(gpio < AR_NUM_GPIO);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

79

reg &= ~(1 << gpio);

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

80

reg |= (val&1) << gpio;

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

90

ar5212GpioGet(struct ath_hal *ah, uint32_t gpio)

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

92

if (gpio < AR_NUM_GPIO) {

sys/dev/netif/ath/ath_hal/ar5212/ar5212_gpio.c

94

val = ((val & AR_GPIOD_MASK) >> gpio) & 0x1;

sys/dev/netif/ath/ath_hal/ar5312/ar5312.h

44

extern HAL_BOOL ar5312GpioCfgOutput(struct ath_hal *, uint32_t gpio,

sys/dev/netif/ath/ath_hal/ar5312/ar5312.h

46

extern HAL_BOOL ar5312GpioCfgInput(struct ath_hal *, uint32_t gpio);

sys/dev/netif/ath/ath_hal/ar5312/ar5312.h

47

extern HAL_BOOL ar5312GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val);

sys/dev/netif/ath/ath_hal/ar5312/ar5312.h

48

extern uint32_t ar5312GpioGet(struct ath_hal *ah, uint32_t gpio);

sys/dev/netif/ath/ath_hal/ar5312/ar5312.h

52

extern HAL_BOOL ar5315GpioCfgOutput(struct ath_hal *, uint32_t gpio,

sys/dev/netif/ath/ath_hal/ar5312/ar5312.h

54

extern HAL_BOOL ar5315GpioCfgInput(struct ath_hal *, uint32_t gpio);

sys/dev/netif/ath/ath_hal/ar5312/ar5312.h

55

extern HAL_BOOL ar5315GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val);

sys/dev/netif/ath/ath_hal/ar5312/ar5312.h

56

extern uint32_t ar5315GpioGet(struct ath_hal *ah, uint32_t gpio);

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

108

ar5312GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel)

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

115

val &= ~(AR_GPIOCR_CR_A(gpio) |

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

117

val |= AR_GPIOCR_CR_N(gpio) | AR_GPIOCR_INT(gpio) | AR_GPIOCR_INT_ENA;

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

38

ar5312GpioCfgOutput(struct ath_hal *ah, uint32_t gpio, HAL_GPIO_MUX_TYPE type)

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

42

HALASSERT(gpio < AR_NUM_GPIO);

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

45

(OS_REG_READ(ah, gpioOffset+AR5312_GPIOCR) &~ AR_GPIOCR_CR_A(gpio))

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

46

| AR_GPIOCR_CR_A(gpio));

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

55

ar5312GpioCfgInput(struct ath_hal *ah, uint32_t gpio)

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

59

HALASSERT(gpio < AR_NUM_GPIO);

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

62

(OS_REG_READ(ah, gpioOffset+AR5312_GPIOCR) &~ AR_GPIOCR_CR_A(gpio))

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

63

| AR_GPIOCR_CR_N(gpio));

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

72

ar5312GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

77

HALASSERT(gpio < AR_NUM_GPIO);

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

80

reg &= ~(1 << gpio);

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

81

reg |= (val&1) << gpio;

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

91

ar5312GpioGet(struct ath_hal *ah, uint32_t gpio)

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

95

if (gpio < AR_NUM_GPIO) {

sys/dev/netif/ath/ath_hal/ar5312/ar5312_gpio.c

97

val = ((val & AR5312_GPIOD_MASK) >> gpio) & 0x1;

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

108

ar5315GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel)

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

116

val |= gpio << AR5315_GPIOINT_S;

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

38

ar5315GpioCfgOutput(struct ath_hal *ah, uint32_t gpio, HAL_GPIO_MUX_TYPE type)

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

42

HALASSERT(gpio < AR_NUM_GPIO);

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

45

(OS_REG_READ(ah, gpioOffset+AR5315_GPIODIR) &~ AR5315_GPIODIR_M(gpio))

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

46

| AR5315_GPIODIR_O(gpio));

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

55

ar5315GpioCfgInput(struct ath_hal *ah, uint32_t gpio)

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

59

HALASSERT(gpio < AR_NUM_GPIO);

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

62

(OS_REG_READ(ah, gpioOffset+AR5315_GPIODIR) &~ AR5315_GPIODIR_M(gpio))

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

63

| AR5315_GPIODIR_I(gpio));

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

72

ar5315GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

77

HALASSERT(gpio < AR_NUM_GPIO);

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

80

reg &= ~(1 << gpio);

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

81

reg |= (val&1) << gpio;

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

91

ar5315GpioGet(struct ath_hal *ah, uint32_t gpio)

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

95

if (gpio < AR_NUM_GPIO) {

sys/dev/netif/ath/ath_hal/ar5312/ar5315_gpio.c

97

val = ((val & AR5315_GPIOD_MASK) >> gpio) & 0x1;

sys/dev/netif/ath/ath_hal/ar5416/ar5416.h

229

extern HAL_BOOL ar5416GpioCfgOutput(struct ath_hal *, uint32_t gpio,

sys/dev/netif/ath/ath_hal/ar5416/ar5416.h

231

extern HAL_BOOL ar5416GpioCfgInput(struct ath_hal *, uint32_t gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416.h

232

extern HAL_BOOL ar5416GpioSet(struct ath_hal *, uint32_t gpio, uint32_t val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416.h

233

extern uint32_t ar5416GpioGet(struct ath_hal *ah, uint32_t gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

107

"%s: gpio=%d, type=%d\n", __func__, gpio, type);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

118

cfgOutputMux(ah, gpio, MuxSignalConversionTable[type]);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

121

gpio_shift = gpio << 1;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

137

ar5416GpioCfgInput(struct ath_hal *ah, uint32_t gpio)

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

141

HALASSERT(gpio < AH_PRIVATE(ah)->ah_caps.halNumGpioPins);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

143

HALDEBUG(ah, HAL_DEBUG_GPIO, "%s: gpio=%d\n", __func__, gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

147

gpio_shift = gpio << 1;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

161

ar5416GpioSet(struct ath_hal *ah, uint32_t gpio, uint32_t val)

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

165

HALASSERT(gpio < AH_PRIVATE(ah)->ah_caps.halNumGpioPins);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

167

"%s: gpio=%d, val=%d\n", __func__, gpio, val);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

171

reg |= AR_GPIO_BIT(gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

173

reg &= ~AR_GPIO_BIT(gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

182

ar5416GpioGet(struct ath_hal *ah, uint32_t gpio)

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

186

if (gpio >= AH_PRIVATE(ah)->ah_caps.halNumGpioPins)

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

200

return ((bits & AR_GPIO_BIT(gpio)) != 0);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

208

ar5416GpioSetIntr(struct ath_hal *ah, u_int gpio, uint32_t ilevel)

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

212

HALASSERT(gpio < AH_PRIVATE(ah)->ah_caps.halNumGpioPins);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

214

"%s: gpio=%d, ilevel=%d\n", __func__, gpio, ilevel);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

218

AR_INTR_ASYNC_ENABLE_GPIO) &~ AR_GPIO_BIT(gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

223

AR_INTR_ASYNC_MASK_GPIO) &~ AR_GPIO_BIT(gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

229

AR_INTR_SYNC_ENABLE_GPIO) &~ AR_GPIO_BIT(gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

234

AR_INTR_SYNC_MASK_GPIO) &~ AR_GPIO_BIT(gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

239

AR_INTR_SYNC_ENABLE_GPIO) | AR_GPIO_BIT(gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

247

val &= ~AR_GPIO_BIT(gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

250

val |= AR_GPIO_BIT(gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

257

AR_INTR_ASYNC_ENABLE_GPIO) | AR_GPIO_BIT(gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

262

AR_INTR_ASYNC_MASK_GPIO) | AR_GPIO_BIT(gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

268

AR_INTR_SYNC_ENABLE_GPIO) | AR_GPIO_BIT(gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

273

AR_INTR_SYNC_MASK_GPIO) | AR_GPIO_BIT(gpio);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

35

cfgOutputMux(struct ath_hal *ah, uint32_t gpio, uint32_t type)

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

41

__func__, gpio, type);

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

44

if (gpio > 11)

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

46

else if (gpio > 5)

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

55

gpio_shift = (gpio % 6) * 5;

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

84

ar5416GpioCfgOutput(struct ath_hal *ah, uint32_t gpio, HAL_GPIO_MUX_TYPE type)

sys/dev/netif/ath/ath_hal/ar5416/ar5416_gpio.c

90

HALASSERT(gpio < AH_PRIVATE(ah)->ah_caps.halNumGpioPins);

sys/dev/sound/pci/hda/hdaa.c

1390

devinfo->gpio = strtol(res + 2, NULL, 16);

sys/dev/sound/pci/hda/hdaa.c

1392

devinfo->gpio = hdaa_gpio_patch(devinfo->gpio, res);

sys/dev/sound/pci/hda/hdaa.c

1396

devinfo->newgpio = devinfo->gpio;

sys/dev/sound/pci/hda/hdaa.c

1398

devinfo->gpio = devinfo->newgpio;

sys/dev/sound/pci/hda/hdaa.c

1406

x = (devinfo->gpio & HDAA_GPIO_MASK(i)) >> HDAA_GPIO_SHIFT(i);

sys/dev/sound/pci/hda/hdaa.c

5161

if (devinfo->gpio != 0 && numgpio != 0) {

sys/dev/sound/pci/hda/hdaa.c

5169

if ((devinfo->gpio & HDAA_GPIO_MASK(i)) ==

sys/dev/sound/pci/hda/hdaa.c

5174

} else if ((devinfo->gpio & HDAA_GPIO_MASK(i)) ==

sys/dev/sound/pci/hda/hdaa.c

5179

} else if ((devinfo->gpio & HDAA_GPIO_MASK(i)) ==

sys/dev/sound/pci/hda/hdaa.c

5182

} else if ((devinfo->gpio & HDAA_GPIO_MASK(i)) ==

sys/dev/sound/pci/hda/hdaa.c

5214

if ((devinfo->gpio & HDAA_GPIO_MASK(i)) ==

sys/dev/sound/pci/hda/hdaa.c

5217

} else if ((devinfo->gpio & HDAA_GPIO_MASK(i)) ==

sys/dev/sound/pci/hda/hdaa.c

6395

uint32_t gpio, x;

sys/dev/sound/pci/hda/hdaa.c

6397

gpio = devinfo->newgpio;

sys/dev/sound/pci/hda/hdaa.c

6401

x = (gpio & HDAA_GPIO_MASK(i)) >> HDAA_GPIO_SHIFT(i);

sys/dev/sound/pci/hda/hdaa.c

6409

gpio = strtol(buf + 2, NULL, 16);

sys/dev/sound/pci/hda/hdaa.c

6411

gpio = hdaa_gpio_patch(gpio, buf);

sys/dev/sound/pci/hda/hdaa.c

6413

devinfo->newgpio = devinfo->gpio = gpio;

sys/dev/sound/pci/hda/hdaa.c

948

hdaa_gpio_patch(uint32_t gpio, const char *str)

sys/dev/sound/pci/hda/hdaa.c

965

gpio &= ~HDAA_GPIO_MASK(ikey);

sys/dev/sound/pci/hda/hdaa.c

966

gpio |= i << HDAA_GPIO_SHIFT(ikey);

sys/dev/sound/pci/hda/hdaa.c

971

return (gpio);

sys/dev/sound/pci/hda/hdaa.h

200

uint32_t gpio;

sys/dev/sound/pci/hda/hdaa.h

270

uint32_t hdaa_gpio_patch(uint32_t gpio, const char *str);

sys/dev/sound/pci/hda/hdaa_patches.c

53

uint32_t gpio;

sys/dev/sound/pci/hda/hdaa_patches.c

536

devinfo->gpio = hdac_quirks[i].gpio;