sys/dev/drm/amd/display/dc/dce/dce_audio.c

455

field = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_audio.c

874

port_connectivity = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_aux.c

140

field = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce/dce_aux.c

398

*returned_bytes = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_aux.c

74

uint32_t field = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce/dce_aux.c

87

uint32_t field = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce/dce_aux.c

95

field = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce/dce_link_encoder.c

1374

get_reg_field_value(hpd_enable, DC_HPD_CONTROL, DC_HPD_EN);

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

154

if (get_reg_field_value(

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

302

if (get_reg_field_value(value, FBC_STATUS, FBC_ENABLE_STATUS)) {

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

309

if (get_reg_field_value(value, FBC_MISC, FBC_STOP_ON_HFLIP_EVENT)) {

sys/dev/drm/amd/display/dc/dce110/dce110_compressor.c

312

if (get_reg_field_value(value, FBC_CNTL, FBC_GRPH_COMP_EN)) {

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

146

chunk_int = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce110/dce110_hw_sequencer.c

151

chunk_mul = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce110/dce110_mem_input_v.c

481

if (get_reg_field_value(value, UNP_GRPH_UPDATE,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

115

bool use_set_a = (get_reg_field_value(cntl_value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_csc_v.c

556

use_set_a = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

72

if (get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_opp_regamma_v.c

75

get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

101

field = get_reg_field_value(value, CRTC_STATUS, CRTC_V_BLANK);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1281

check_point = get_reg_field_value(value_crtc_vtotal,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1506

if (get_reg_field_value(pol_value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1782

bool force = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1785

bool vert_sync = get_reg_field_value(value1,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1968

if (get_reg_field_value(

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

1972

get_reg_field_value(

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

200

struc_en = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

205

struc_stereo_sel_ovr = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2089

field = get_reg_field_value(value, CRTC_CONTROL,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2181

field = get_reg_field_value(value, CRTC_CRC_CNTL, CRTC_CRC_EN);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2189

*r_cr = get_reg_field_value(value, CRTC_CRC0_DATA_RG, CRC0_R_CR);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2190

*g_y = get_reg_field_value(value, CRTC_CRC0_DATA_RG, CRC0_G_Y);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

2194

*b_cb = get_reg_field_value(value, CRTC_CRC0_DATA_B, CRC0_B_CB);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

513

uint32_t field = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

537

position->horizontal_count = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

542

position->vertical_count = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

549

position->nominal_vcount = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

578

*v_blank_start = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator.c

581

*v_blank_end = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

149

field = get_reg_field_value(value, CRTCV_STATUS, CRTC_V_BLANK);

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

163

h1 = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

168

v1 = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

175

h2 = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

180

v2 = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce110/dce110_timing_generator_v.c

602

uint32_t field = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

192

get_reg_field_value(value, SCLV_MODE, SCL_MODE),

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

197

get_reg_field_value(value, SCLV_MODE, SCL_PSCL_EN),

sys/dev/drm/amd/display/dc/dce110/dce110_transform_v.c

309

if (get_reg_field_value(

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

300

if (get_reg_field_value(

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

447

if (get_reg_field_value(value, FBC_STATUS, FBC_ENABLE_STATUS)) {

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

454

if (get_reg_field_value(value, FBC_MISC, FBC_STOP_ON_HFLIP_EVENT)) {

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

457

if (get_reg_field_value(value, FBC_CNTL, FBC_GRPH_COMP_EN)) {

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

473

return get_reg_field_value(

sys/dev/drm/amd/display/dc/dce112/dce112_compressor.c

628

channels = get_reg_field_value(value_control,

sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c

79

chunk_int = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce112/dce112_hw_sequencer.c

84

chunk_mul = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce120/dce120_hw_sequencer.c

117

chunk_int = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce120/dce120_hw_sequencer.c

122

chunk_mul = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

592

straps->audio_stream_number = get_reg_field_value(reg_val,

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

595

straps->hdmi_disable = get_reg_field_value(reg_val,

sys/dev/drm/amd/display/dc/dce120/dce120_resource.c

600

straps->dc_pinstraps_audio = get_reg_field_value(reg_val,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

183

uint32_t field = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

201

position->horizontal_count = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

204

position->vertical_count = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

212

position->nominal_vcount = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

266

get_reg_field_value(value_crtc_vtotal,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

331

if (get_reg_field_value(pol_value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

393

return get_reg_field_value(value,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

633

position->horizontal_count = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

638

position->vertical_count = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

648

position->nominal_vcount = get_reg_field_value(

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

671

*v_blank_start = get_reg_field_value(v_blank_start_end,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

674

*v_blank_end = get_reg_field_value(v_blank_start_end,

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

781

if (get_reg_field_value(

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

785

get_reg_field_value(

sys/dev/drm/amd/display/dc/dce120/dce120_timing_generator.c

95

field = get_reg_field_value(value, CRTC0_CRTC_STATUS, CRTC_V_BLANK);

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

105

uint32_t field = get_reg_field_value(

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

118

uint32_t field = get_reg_field_value(

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

126

field = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

171

field = get_reg_field_value(

sys/dev/drm/amd/display/dc/i2caux/dce110/aux_engine_dce110.c

431

*returned_bytes = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

149

i2c_sw_status = get_reg_field_value(

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

308

pre_scale = get_reg_field_value(

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

373

i2c_sw_status = get_reg_field_value(

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

385

i2c_sw_status = get_reg_field_value(

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

697

*buffer++ = get_reg_field_value(

sys/dev/drm/amd/display/dc/i2caux/dce80/i2c_hw_engine_dce80.c

713

i2c_sw_status = get_reg_field_value(

sys/dev/drm/amd/display/dc/irq/dce110/irq_service_dce110.c

47

uint32_t current_status = get_reg_field_value(value,

sys/dev/drm/amd/display/dc/irq/dce120/irq_service_dce120.c

47

get_reg_field_value(

sys/dev/drm/amd/display/dc/irq/dce80/irq_service_dce80.c

47

get_reg_field_value(

sys/dev/drm/amd/display/dc/irq/dcn10/irq_service_dcn10.c

117

get_reg_field_value(