bus_space_write_2
bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (a), (x))
bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (sc)->sc_offs+(a), (x))
do { OBARR(sc); bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); } while (0)
do { UBARR(sc); bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, (r), (x)); \
bus_space_write_2(sc->sc_io_tag, sc->sc_io_hdl, UHCI_INTR, 0);
bus_space_write_2((sc)->sc_io_tag, (sc)->sc_io_hdl, \
static __inline void bus_space_write_2(bus_space_tag_t tag,
bus_space_write_2((t), (h), (o), (v))
bus_space_write_2(ACPI_BUS_SPACE_IO, ACPI_BUS_HANDLE, OutPort, Value);
bus_space_write_2((adv)->tag, (adv)->bsh, offset, val)
bus_space_write_2(adv->tag, adv->bsh, offset, *valp++);
bus_space_write_2((adw)->tag, (adw)->bsh, port, value)
bus_space_write_2((amd)->tag, (amd)->bsh, port, value)
bus_space_write_2(isp->isp_bus_tag, isp->isp_bus_handle, off, v)
bus_space_write_2(rman_get_bustag((res)), \
#define OUTW(r, val) bus_space_write_2(np->bst, np->bsh, \
#define trm_reg_write16(value,reg) bus_space_write_2(pACB->tag, pACB->bsh,\
bus_space_write_2((_sc)->ae_mem_bt, (_sc)->ae_mem_bh, (reg), (val))
bus_space_write_2((_sc)->age_mem_bt, (_sc)->age_mem_bh, (reg), (val))
bus_space_write_2(sc->alc_res_btag, sc->alc_res_bhand, (reg), (val))
bus_space_write_2((_sc)->ale_mem_bt, (_sc)->ale_mem_bh, (reg), (val))
bus_space_write_2(sc->bce_btag, sc->bce_bhandle, reg, val)
bus_space_write_2((sc)->siba_mem_bt, (sc)->siba_mem_bh, \
bus_space_write_2((siba)->siba_mem_bt, (siba)->siba_mem_bh, \
bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
bus_space_write_2(((struct e1000_osdep *)(hw)->back)->mem_bus_space_tag, \
bus_space_write_2(((struct e1000_osdep *)(hw)->back)->flash_bus_space_tag, \
bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
bus_space_write_2(sc->lge_btag, sc->lge_bhandle, reg, val)
bus_space_write_2(lesc->sc_regt, lesc->sc_regh, PCNET_PCI_RAP, port);
bus_space_write_2(lesc->sc_regt, lesc->sc_regh, PCNET_PCI_BDP, val);
bus_space_write_2(lesc->sc_regt, lesc->sc_regh, PCNET_PCI_RAP, port);
bus_space_write_2(lesc->sc_regt, lesc->sc_regh, PCNET_PCI_RAP, port);
bus_space_write_2(lesc->sc_regt, lesc->sc_regh, PCNET_PCI_RDP, val);
bus_space_write_2(lesc->sc_regt, lesc->sc_regh, PCNET_PCI_RAP, port);
bus_space_write_2((sc)->msk_res_bt, (sc)->msk_res_bh, (reg), (val))
bus_space_write_2((sc)->msk_res_bt, (sc)->msk_res_bh, \
bus_space_write_2(sc->my_btag, sc->my_bhandle, reg, val)
((IS_BE(sc) || IS_SH(sc)) ? (bus_space_write_2((sc)->space##_btag, \
: (bus_space_write_2((sc)->devcfg_btag, \
bus_space_write_2(sc->pcn_btag, sc->pcn_bhandle, reg, val)
bus_space_write_2(sc->re_btag, sc->re_bhandle, reg, val)
#define CSR_WRITE_2(sc, reg, val) ((sc->prohibit_access_reg)?:bus_space_write_2(sc->re_btag, sc->re_bhandle, reg, val))
#define RE_CMAC_WRITE_2(sc, reg, val) ((sc->prohibit_access_reg)?:bus_space_write_2(sc->re_cmac_tag, sc->re_cmac_handle, reg, val))
bus_space_write_2(sc->re_cmac_tag, sc->re_cmac_handle, reg, val)
bus_space_write_2(sc->rl_btag, sc->rl_bhandle, reg, val)
bus_space_write_2((sc)->sk_btag, (sc)->sk_bhandle, (reg), (val))
#define SLN_WRITE_2(adapter, reg, val) bus_space_write_2(adapter->sln_bustag, adapter->sln_bushandle, reg, val)
bus_space_write_2(sc->ste_btag, sc->ste_bhandle, reg, val)
bus_space_write_2((_sc)->sc_btag, (_sc)->sc_bhandle, (reg), (val))
bus_space_write_2(sc->tl_btag, sc->tl_bhandle, reg, val)
bus_space_write_2((sc)->sc_st, (sc)->sc_sh, (reg), (val))
bus_space_write_2(sc->vge_btag, sc->vge_bhandle, reg, val)
bus_space_write_2(sc->vr_btag, sc->vr_bhandle, reg, val)
bus_space_write_2(sc->wb_btag, sc->wb_bhandle, reg, val)
bus_space_write_2((sc)->wi_btag, (sc)->wi_bhandle, \
#define XE_OUTW(r, w) bus_space_write_2(scp->bst, scp->bsh, (r), (w))
bus_space_write_2(sc->xl_btag, sc->xl_bhandle, reg, val)
#define AAC_MEM0_SETREG2(sc, reg, val) bus_space_write_2(sc->aac_btag0, \
#define AAC_MEM1_SETREG2(sc, reg, val) bus_space_write_2(sc->aac_btag1, \
bus_space_write_2((ida)->tag, (ida)->bsh, port, val)
bus_space_write_2(gdt->sc_dpmemt, gdt->sc_dpmemh,
bus_space_write_2(gdt->sc_dpmemt, gdt->sc_dpmemh,
#define ips_write_2(sc,offset,value) bus_space_write_2(sc->bustag, sc->bushandle, offset, value)
#define MFI_WRITE2(sc, reg, val) bus_space_write_2((sc)->mfi_btag, \
bus_space_write_2(bus_tag, bus_handle, offset, (TW_INT16)value);
bus_space_write_2(bus_tag, bus_handle, offset,
bus_space_write_2(au->st[mapno], au->sh[mapno], regno, data);
bus_space_write_2(sc->st, sc->sh, regno, data);
bus_space_write_2(sc->st, sc->sh, regno, data);
bus_space_write_2(sc->st, sc->sh, regno, data);
bus_space_write_2(sc->cst, sc->csh, regno, data);
bus_space_write_2(sc->mtt, sc->mth, regno, data);
bus_space_write_2(sc->cst, sc->csh, regno, data);
bus_space_write_2(sc->mtt, sc->mth, regno, data);
bus_space_write_2(es->st, es->sh, regno, data);
bus_space_write_2(fm801->st, fm801->sh, regno, data);
bus_space_write_2((mem)->mem_tag, (mem)->mem_handle, (offset), (value))
bus_space_write_2((sc)->cst, (sc)->csh, (regno), (data))
bus_space_write_2(sc->nabmbart, sc->nabmbarh, regno, data);
bus_space_write_2(sc->nambart, sc->nambarh, regno, data);
bus_space_write_2(sc->st, sc->sh, regno, data);
bus_space_write_2(st, sh, regno, data);
bus_space_write_2(st, sh, regno, data);
bus_space_write_2(st, sh, regno, data);
bus_space_write_2(tr->st, tr->sh, regno, data);
bus_space_write_2(via->st, via->sh, regno, data);
bus_space_write_2(via->st, via->sh, regno, data);
#define OUTW(bktr,offset,value) bus_space_write_2((bktr)->memt,(bktr)->memh,(offset),(value))
bus_space_write_2((sc)->btag, (sc)->bhandle, (reg), val))
bus_space_write_2(res->pr_bt, res->pr_bh, reg, val);
bus_space_write_2((r)->r_bustag, (r)->r_bushandle, (o), (v))