sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

851

amdgpu_ring_write(ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0));

sys/dev/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c

852

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/amdgpu_ring.c

97

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

1038

amdgpu_ring_write(ring, VCE_CMD_IB);

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

1039

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

1040

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

1041

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

1056

amdgpu_ring_write(ring, VCE_CMD_FENCE);

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

1057

amdgpu_ring_write(ring, addr);

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

1058

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

1059

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

1060

amdgpu_ring_write(ring, VCE_CMD_TRAP);

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

1061

amdgpu_ring_write(ring, VCE_CMD_END);

sys/dev/drm/amd/amdgpu/amdgpu_vce.c

1087

amdgpu_ring_write(ring, VCE_CMD_END);

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

443

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

445

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

626

amdgpu_ring_write(ring, VCN_ENC_CMD_END);

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

799

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/amdgpu_vcn.c

801

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/drm/amd/amdgpu/cik_sdma.c

206

amdgpu_ring_write(ring, ring->funcs->nop |

sys/dev/drm/amd/amdgpu/cik_sdma.c

209

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/drm/amd/amdgpu/cik_sdma.c

229

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_INDIRECT_BUFFER, 0, extra_bits));

sys/dev/drm/amd/amdgpu/cik_sdma.c

230

amdgpu_ring_write(ring, ib->gpu_addr & 0xffffffe0); /* base must be 32 byte aligned */

sys/dev/drm/amd/amdgpu/cik_sdma.c

231

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xffffffff);

sys/dev/drm/amd/amdgpu/cik_sdma.c

232

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/drm/amd/amdgpu/cik_sdma.c

254

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_POLL_REG_MEM, 0, extra_bits));

sys/dev/drm/amd/amdgpu/cik_sdma.c

255

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_DONE << 2);

sys/dev/drm/amd/amdgpu/cik_sdma.c

256

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_REQ << 2);

sys/dev/drm/amd/amdgpu/cik_sdma.c

257

amdgpu_ring_write(ring, ref_and_mask); /* reference */

sys/dev/drm/amd/amdgpu/cik_sdma.c

258

amdgpu_ring_write(ring, ref_and_mask); /* mask */

sys/dev/drm/amd/amdgpu/cik_sdma.c

259

amdgpu_ring_write(ring, (0xfff << 16) | 10); /* retry count, poll interval */

sys/dev/drm/amd/amdgpu/cik_sdma.c

277

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_FENCE, 0, 0));

sys/dev/drm/amd/amdgpu/cik_sdma.c

278

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/drm/amd/amdgpu/cik_sdma.c

279

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/cik_sdma.c

280

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/drm/amd/amdgpu/cik_sdma.c

285

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_FENCE, 0, 0));

sys/dev/drm/amd/amdgpu/cik_sdma.c

286

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/drm/amd/amdgpu/cik_sdma.c

287

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/cik_sdma.c

288

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/drm/amd/amdgpu/cik_sdma.c

292

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_TRAP, 0, 0));

sys/dev/drm/amd/amdgpu/cik_sdma.c

636

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0));

sys/dev/drm/amd/amdgpu/cik_sdma.c

637

amdgpu_ring_write(ring, lower_32_bits(gpu_addr));

sys/dev/drm/amd/amdgpu/cik_sdma.c

638

amdgpu_ring_write(ring, upper_32_bits(gpu_addr));

sys/dev/drm/amd/amdgpu/cik_sdma.c

639

amdgpu_ring_write(ring, 1); /* number of DWs to follow */

sys/dev/drm/amd/amdgpu/cik_sdma.c

640

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/drm/amd/amdgpu/cik_sdma.c

853

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_POLL_REG_MEM, 0,

sys/dev/drm/amd/amdgpu/cik_sdma.c

857

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/drm/amd/amdgpu/cik_sdma.c

858

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);

sys/dev/drm/amd/amdgpu/cik_sdma.c

859

amdgpu_ring_write(ring, seq); /* reference */

sys/dev/drm/amd/amdgpu/cik_sdma.c

860

amdgpu_ring_write(ring, 0xffffffff); /* mask */

sys/dev/drm/amd/amdgpu/cik_sdma.c

861

amdgpu_ring_write(ring, (0xfff << 16) | 4); /* retry count, poll interval */

sys/dev/drm/amd/amdgpu/cik_sdma.c

881

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_POLL_REG_MEM, 0, extra_bits));

sys/dev/drm/amd/amdgpu/cik_sdma.c

882

amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST << 2);

sys/dev/drm/amd/amdgpu/cik_sdma.c

883

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/cik_sdma.c

884

amdgpu_ring_write(ring, 0); /* reference */

sys/dev/drm/amd/amdgpu/cik_sdma.c

885

amdgpu_ring_write(ring, 0); /* mask */

sys/dev/drm/amd/amdgpu/cik_sdma.c

886

amdgpu_ring_write(ring, (0xfff << 16) | 10); /* retry count, poll interval */

sys/dev/drm/amd/amdgpu/cik_sdma.c

892

amdgpu_ring_write(ring, SDMA_PACKET(SDMA_OPCODE_SRBM_WRITE, 0, 0xf000));

sys/dev/drm/amd/amdgpu/cik_sdma.c

893

amdgpu_ring_write(ring, reg);

sys/dev/drm/amd/amdgpu/cik_sdma.c

894

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2078

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2079

amdgpu_ring_write(ring, (scratch - PACKET3_SET_UCONFIG_REG_START));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2080

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2128

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2129

amdgpu_ring_write(ring, (WAIT_REG_MEM_OPERATION(1) | /* write, wait, write */

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2132

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_REQ);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2133

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_DONE);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2134

amdgpu_ring_write(ring, ref_and_mask);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2135

amdgpu_ring_write(ring, ref_and_mask);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2136

amdgpu_ring_write(ring, 0x20); /* poll interval */

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2141

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2142

amdgpu_ring_write(ring, EVENT_TYPE(VS_PARTIAL_FLUSH) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2145

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2146

amdgpu_ring_write(ring, EVENT_TYPE(VGT_FLUSH) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2167

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2168

amdgpu_ring_write(ring, (EOP_TCL1_ACTION_EN |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2172

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2173

amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xffff) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2175

amdgpu_ring_write(ring, lower_32_bits(seq - 1));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2176

amdgpu_ring_write(ring, upper_32_bits(seq - 1));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2179

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2180

amdgpu_ring_write(ring, (EOP_TCL1_ACTION_EN |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2184

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2185

amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xffff) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2187

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2188

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2208

amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 5));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2209

amdgpu_ring_write(ring, (EOP_TCL1_ACTION_EN |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2213

amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2214

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2215

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2216

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2217

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2243

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2244

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2254

amdgpu_ring_write(ring, header);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2255

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2260

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFFFF);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2261

amdgpu_ring_write(ring, control);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2270

amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2271

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2276

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFFFF);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2277

amdgpu_ring_write(ring, control);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2295

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2296

amdgpu_ring_write(ring, dw2);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2297

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2509

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2510

amdgpu_ring_write(ring, PACKET3_BASE_INDEX(CE_PARTITION_BASE));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2511

amdgpu_ring_write(ring, 0x8000);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2512

amdgpu_ring_write(ring, 0x8000);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2515

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2516

amdgpu_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2518

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2519

amdgpu_ring_write(ring, 0x80000000);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2520

amdgpu_ring_write(ring, 0x80000000);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2525

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2527

amdgpu_ring_write(ring, ext->reg_index - PACKET3_SET_CONTEXT_REG_START);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2529

amdgpu_ring_write(ring, ext->extent[i]);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2534

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2535

amdgpu_ring_write(ring, mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2536

amdgpu_ring_write(ring, adev->gfx.config.rb_config[0][0].raster_config);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2537

amdgpu_ring_write(ring, adev->gfx.config.rb_config[0][0].raster_config_1);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2539

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2540

amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2542

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2543

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2545

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2546

amdgpu_ring_write(ring, 0x00000316);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2547

amdgpu_ring_write(ring, 0x0000000e); /* VGT_VERTEX_REUSE_BLOCK_CNTL */

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

2548

amdgpu_ring_write(ring, 0x00000010); /* VGT_OUT_DEALLOC_CNTL */

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3189

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3190

amdgpu_ring_write(ring, (WAIT_REG_MEM_MEM_SPACE(1) | /* memory */

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3193

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3194

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3195

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3196

amdgpu_ring_write(ring, 0xffffffff);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3197

amdgpu_ring_write(ring, 4); /* poll interval */

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3201

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3202

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3203

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3204

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3230

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3231

amdgpu_ring_write(ring, (WAIT_REG_MEM_OPERATION(0) | /* wait */

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3234

amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3235

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3236

amdgpu_ring_write(ring, 0); /* ref */

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3237

amdgpu_ring_write(ring, 0); /* mask */

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3238

amdgpu_ring_write(ring, 0x20); /* poll interval */

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3243

amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3244

amdgpu_ring_write(ring, 0x0);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3247

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3248

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3249

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3250

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3259

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3260

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(usepfp) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3262

amdgpu_ring_write(ring, reg);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3263

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

3264

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4175

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4176

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4178

amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].mem_base);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4179

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4180

amdgpu_ring_write(ring, gds_base);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4183

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4184

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4186

amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].mem_size);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4187

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4188

amdgpu_ring_write(ring, gds_size);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4191

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4192

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4194

amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].gws);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4195

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4196

amdgpu_ring_write(ring, gws_size << GDS_GWS_VMID0__SIZE__SHIFT | gws_base);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4199

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4200

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4202

amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].oa);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4203

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v7_0.c

4204

amdgpu_ring_write(ring, (1 << (oa_size + oa_base)) - (1 << oa_base));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4256

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4257

amdgpu_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4259

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4260

amdgpu_ring_write(ring, 0x80000000);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4261

amdgpu_ring_write(ring, 0x80000000);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4266

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4269

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4272

amdgpu_ring_write(ring, ext->extent[i]);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4277

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4278

amdgpu_ring_write(ring, mmPA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4279

amdgpu_ring_write(ring, adev->gfx.config.rb_config[0][0].raster_config);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4280

amdgpu_ring_write(ring, adev->gfx.config.rb_config[0][0].raster_config_1);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4282

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4283

amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4285

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4286

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4289

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4290

amdgpu_ring_write(ring, PACKET3_BASE_INDEX(CE_PARTITION_BASE));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4291

amdgpu_ring_write(ring, 0x8000);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4292

amdgpu_ring_write(ring, 0x8000);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4447

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4448

amdgpu_ring_write(kiq_ring, 0); /* vmid_mask:0 queue_type:0 (KIQ) */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4449

amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4450

amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4451

amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4452

amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4453

amdgpu_ring_write(kiq_ring, 0); /* oac mask */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4454

amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4461

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4463

amdgpu_ring_write(kiq_ring,

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4465

amdgpu_ring_write(kiq_ring,

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4470

amdgpu_ring_write(kiq_ring, lower_32_bits(mqd_addr));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4471

amdgpu_ring_write(kiq_ring, upper_32_bits(mqd_addr));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4472

amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4473

amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4893

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4894

amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4899

amdgpu_ring_write(kiq_ring, PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(ring->doorbell_index));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4900

amdgpu_ring_write(kiq_ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4901

amdgpu_ring_write(kiq_ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

4902

amdgpu_ring_write(kiq_ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5234

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5235

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5237

amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].mem_base);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5238

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5239

amdgpu_ring_write(ring, gds_base);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5242

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5243

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5245

amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].mem_size);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5246

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5247

amdgpu_ring_write(ring, gds_size);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5250

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5251

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5253

amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].gws);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5254

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5255

amdgpu_ring_write(ring, gws_size << GDS_GWS_VMID0__SIZE__SHIFT | gws_base);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5258

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5259

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5261

amdgpu_ring_write(ring, amdgpu_gds_reg_offset[vmid].oa);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5262

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

5263

amdgpu_ring_write(ring, (1 << (oa_size + oa_base)) - (1 << oa_base));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6113

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6114

amdgpu_ring_write(ring, (WAIT_REG_MEM_OPERATION(1) | /* write, wait, write */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6117

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_REQ);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6118

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_DONE);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6119

amdgpu_ring_write(ring, ref_and_mask);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6120

amdgpu_ring_write(ring, ref_and_mask);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6121

amdgpu_ring_write(ring, 0x20); /* poll interval */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6126

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6127

amdgpu_ring_write(ring, EVENT_TYPE(VS_PARTIAL_FLUSH) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6130

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6131

amdgpu_ring_write(ring, EVENT_TYPE(VGT_FLUSH) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6155

amdgpu_ring_write(ring, header);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6156

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6161

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFFFF);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6162

amdgpu_ring_write(ring, control);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6171

amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6172

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6177

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFFFF);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6178

amdgpu_ring_write(ring, control);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6188

amdgpu_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6189

amdgpu_ring_write(ring, (EOP_TCL1_ACTION_EN |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6194

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6195

amdgpu_ring_write(ring, (upper_32_bits(addr) & 0xffff) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6197

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6198

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6208

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6209

amdgpu_ring_write(ring, (WAIT_REG_MEM_MEM_SPACE(1) | /* memory */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6212

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6213

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6214

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6215

amdgpu_ring_write(ring, 0xffffffff);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6216

amdgpu_ring_write(ring, 4); /* poll interval */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6227

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6228

amdgpu_ring_write(ring, (WAIT_REG_MEM_OPERATION(0) | /* wait */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6231

amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6232

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6233

amdgpu_ring_write(ring, 0); /* ref */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6234

amdgpu_ring_write(ring, 0); /* mask */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6235

amdgpu_ring_write(ring, 0x20); /* poll interval */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6240

amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6241

amdgpu_ring_write(ring, 0x0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6365

amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 5));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6366

amdgpu_ring_write(ring, (EOP_TCL1_ACTION_EN |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6371

amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6372

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6373

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6374

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6375

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6385

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6386

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6388

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6389

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6390

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6394

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6395

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6397

amdgpu_ring_write(ring, mmCPC_INT_STATUS);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6398

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6399

amdgpu_ring_write(ring, 0x20000000); /* src_id is 178 */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6405

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6406

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6437

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6438

amdgpu_ring_write(ring, dw2);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6439

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6446

amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6447

amdgpu_ring_write(ring, lower_32_bits(ring->cond_exe_gpu_addr));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6448

amdgpu_ring_write(ring, upper_32_bits(ring->cond_exe_gpu_addr));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6449

amdgpu_ring_write(ring, 0); /* discard following DWs if *cond_exec_gpu_addr==0 */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6451

amdgpu_ring_write(ring, 0x55aa55aa); /* patch dummy value later */

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6473

amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6474

amdgpu_ring_write(ring, 0 | /* src: register*/

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6477

amdgpu_ring_write(ring, reg);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6478

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6479

amdgpu_ring_write(ring, lower_32_bits(adev->wb.gpu_addr +

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6481

amdgpu_ring_write(ring, upper_32_bits(adev->wb.gpu_addr +

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6502

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6503

amdgpu_ring_write(ring, cmd);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6504

amdgpu_ring_write(ring, reg);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6505

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

6506

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

7199

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt_ce));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

7200

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(2) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

7204

amdgpu_ring_write(ring, lower_32_bits(ce_payload_addr));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

7205

amdgpu_ring_write(ring, upper_32_bits(ce_payload_addr));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

7232

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt_de));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

7233

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(1) |

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

7237

amdgpu_ring_write(ring, lower_32_bits(de_payload_addr));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

7238

amdgpu_ring_write(ring, upper_32_bits(de_payload_addr));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

854

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

855

amdgpu_ring_write(ring, (scratch - PACKET3_SET_UCONFIG_REG_START));

sys/dev/drm/amd/amdgpu/gfx_v8_0.c

856

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1648

amdgpu_ring_write(ring, PACKET3(PACKET3_DMA_DATA, 5));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1649

amdgpu_ring_write(ring, (PACKET3_DMA_DATA_CP_SYNC |

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1652

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1653

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1654

amdgpu_ring_write(ring, adev->gfx.ngg.gds_reserve_addr);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1655

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

1656

amdgpu_ring_write(ring, PACKET3_DMA_DATA_CMD_RAW_WAIT |

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2624

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2625

amdgpu_ring_write(ring, PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2627

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2628

amdgpu_ring_write(ring, 0x80000000);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2629

amdgpu_ring_write(ring, 0x80000000);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2634

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2637

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2640

amdgpu_ring_write(ring, ext->extent[i]);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2645

amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2646

amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2648

amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2649

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2651

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2652

amdgpu_ring_write(ring, PACKET3_BASE_INDEX(CE_PARTITION_BASE));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2653

amdgpu_ring_write(ring, 0x8000);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2654

amdgpu_ring_write(ring, 0x8000);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2656

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG,1));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2659

amdgpu_ring_write(ring, tmp);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2660

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2838

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2839

amdgpu_ring_write(kiq_ring, PACKET3_SET_RESOURCES_VMID_MASK(0) |

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2841

amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2842

amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2843

amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2844

amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2845

amdgpu_ring_write(kiq_ring, 0); /* oac mask */

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2846

amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2852

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2854

amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2864

amdgpu_ring_write(kiq_ring, PACKET3_MAP_QUEUES_DOORBELL_OFFSET(ring->doorbell_index));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2865

amdgpu_ring_write(kiq_ring, lower_32_bits(mqd_addr));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2866

amdgpu_ring_write(kiq_ring, upper_32_bits(mqd_addr));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2867

amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

2868

amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3385

amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3386

amdgpu_ring_write(kiq_ring, /* Q_sel: 0, vmid: 0, engine: 0, num_Q: 1 */

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3391

amdgpu_ring_write(kiq_ring, PACKET3_UNMAP_QUEUES_DOORBELL_OFFSET0(ring->doorbell_index));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3392

amdgpu_ring_write(kiq_ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3393

amdgpu_ring_write(kiq_ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

3394

amdgpu_ring_write(kiq_ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

359

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

360

amdgpu_ring_write(ring, WRITE_DATA_ENGINE_SEL(eng_sel) |

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

363

amdgpu_ring_write(ring, reg);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

364

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

365

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

373

amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

374

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

383

amdgpu_ring_write(ring, addr0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

384

amdgpu_ring_write(ring, addr1);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

385

amdgpu_ring_write(ring, ref);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

386

amdgpu_ring_write(ring, mask);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

387

amdgpu_ring_write(ring, inv); /* poll interval */

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4096

amdgpu_ring_write(ring, header);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4098

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4103

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4104

amdgpu_ring_write(ring, control);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

411

amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4113

amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4115

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

412

amdgpu_ring_write(ring, (scratch - PACKET3_SET_UCONFIG_REG_START));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4120

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4121

amdgpu_ring_write(ring, control);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

413

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4132

amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4133

amdgpu_ring_write(ring, ((writeback ? (EOP_TC_WB_ACTION_EN |

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4141

amdgpu_ring_write(ring, DATA_SEL(write64bit ? 2 : 1) | INT_SEL(int_sel ? 2 : 0));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4151

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4152

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4153

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4154

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4155

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4177

amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4178

amdgpu_ring_write(ring, 0x0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4320

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4321

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4323

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4324

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4325

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4329

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4330

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(0) |

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4332

amdgpu_ring_write(ring, SOC15_REG_OFFSET(GC, 0, mmCPC_INT_STATUS));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4333

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4334

amdgpu_ring_write(ring, 0x20000000); /* src_id is 178 */

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4340

amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4341

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4353

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4354

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(2) |

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4358

amdgpu_ring_write(ring, lower_32_bits(csa_addr + offsetof(struct v9_gfx_meta_data, ce_payload)));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4359

amdgpu_ring_write(ring, upper_32_bits(csa_addr + offsetof(struct v9_gfx_meta_data, ce_payload)));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4375

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4376

amdgpu_ring_write(ring, (WRITE_DATA_ENGINE_SEL(1) |

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4380

amdgpu_ring_write(ring, lower_32_bits(csa_addr + offsetof(struct v9_gfx_meta_data, de_payload)));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4381

amdgpu_ring_write(ring, upper_32_bits(csa_addr + offsetof(struct v9_gfx_meta_data, de_payload)));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4387

amdgpu_ring_write(ring, PACKET3(PACKET3_FRAME_CONTROL, 0));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4388

amdgpu_ring_write(ring, FRAME_CMD(start ? 0 : 1)); /* frame_end */

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4420

amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4421

amdgpu_ring_write(ring, dw2);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4422

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4428

amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4429

amdgpu_ring_write(ring, lower_32_bits(ring->cond_exe_gpu_addr));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4430

amdgpu_ring_write(ring, upper_32_bits(ring->cond_exe_gpu_addr));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4431

amdgpu_ring_write(ring, 0); /* discard following DWs if *cond_exec_gpu_addr==0 */

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4433

amdgpu_ring_write(ring, 0x55aa55aa); /* patch dummy value later */

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4454

amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4455

amdgpu_ring_write(ring, 0 | /* src: register*/

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4458

amdgpu_ring_write(ring, reg);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4459

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4460

amdgpu_ring_write(ring, lower_32_bits(adev->wb.gpu_addr +

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4462

amdgpu_ring_write(ring, upper_32_bits(adev->wb.gpu_addr +

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4482

amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4483

amdgpu_ring_write(ring, cmd);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4484

amdgpu_ring_write(ring, reg);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4485

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/gfx_v9_0.c

4486

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

233

amdgpu_ring_write(ring, ring->funcs->nop |

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

236

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

254

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_INDIRECT) |

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

257

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

258

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

259

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

260

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

261

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

281

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

284

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_DONE << 2);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

285

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_REQ << 2);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

286

amdgpu_ring_write(ring, ref_and_mask); /* reference */

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

287

amdgpu_ring_write(ring, ref_and_mask); /* mask */

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

288

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

307

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE));

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

308

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

309

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

310

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

315

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE));

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

316

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

317

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

318

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

322

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_TRAP));

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

323

amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0));

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

569

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

571

amdgpu_ring_write(ring, lower_32_bits(gpu_addr));

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

572

amdgpu_ring_write(ring, upper_32_bits(gpu_addr));

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

573

amdgpu_ring_write(ring, SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(1));

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

574

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

791

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

795

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

796

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

797

amdgpu_ring_write(ring, seq); /* reference */

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

798

amdgpu_ring_write(ring, 0xffffffff); /* mask */

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

799

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

818

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

821

amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST << 2);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

822

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

823

amdgpu_ring_write(ring, 0); /* reference */

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

824

amdgpu_ring_write(ring, 0); /* mask */

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

825

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

832

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

834

amdgpu_ring_write(ring, reg);

sys/dev/drm/amd/amdgpu/sdma_v2_4.c

835

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1062

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1066

amdgpu_ring_write(ring, addr & 0xfffffffc);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1067

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xffffffff);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1068

amdgpu_ring_write(ring, seq); /* reference */

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1069

amdgpu_ring_write(ring, 0xffffffff); /* mask */

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1070

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1089

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1092

amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST << 2);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1093

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1094

amdgpu_ring_write(ring, 0); /* reference */

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1095

amdgpu_ring_write(ring, 0); /* mask */

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1096

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1103

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1105

amdgpu_ring_write(ring, reg);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

1106

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

407

amdgpu_ring_write(ring, ring->funcs->nop |

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

410

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

428

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_INDIRECT) |

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

431

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

432

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

433

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

434

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

435

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

455

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

458

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_DONE << 2);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

459

amdgpu_ring_write(ring, mmGPU_HDP_FLUSH_REQ << 2);

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

460

amdgpu_ring_write(ring, ref_and_mask); /* reference */

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

461

amdgpu_ring_write(ring, ref_and_mask); /* mask */

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

462

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

481

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE));

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

482

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

483

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

484

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

489

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE));

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

490

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

491

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

492

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

496

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_TRAP));

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

497

amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0));

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

841

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

843

amdgpu_ring_write(ring, lower_32_bits(gpu_addr));

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

844

amdgpu_ring_write(ring, upper_32_bits(gpu_addr));

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

845

amdgpu_ring_write(ring, SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(1));

sys/dev/drm/amd/amdgpu/sdma_v3_0.c

846

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1013

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) |

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1015

amdgpu_ring_write(ring, lower_32_bits(gpu_addr));

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1016

amdgpu_ring_write(ring, upper_32_bits(gpu_addr));

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1017

amdgpu_ring_write(ring, SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(0));

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1018

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1264

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_SRBM_WRITE) |

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1266

amdgpu_ring_write(ring, reg);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

1267

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

433

amdgpu_ring_write(ring, ring->funcs->nop |

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

436

amdgpu_ring_write(ring, ring->funcs->nop);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

454

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_INDIRECT) |

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

457

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

458

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

459

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

460

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

461

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

471

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_POLL_REGMEM) |

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

477

amdgpu_ring_write(ring, addr0);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

478

amdgpu_ring_write(ring, addr1);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

481

amdgpu_ring_write(ring, addr0 << 2);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

482

amdgpu_ring_write(ring, addr1 << 2);

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

484

amdgpu_ring_write(ring, ref); /* reference */

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

485

amdgpu_ring_write(ring, mask); /* mask */

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

486

amdgpu_ring_write(ring, SDMA_PKT_POLL_REGMEM_DW5_RETRY_COUNT(0xfff) |

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

529

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE));

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

532

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

533

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

534

amdgpu_ring_write(ring, lower_32_bits(seq));

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

539

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_FENCE));

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

542

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

543

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

544

amdgpu_ring_write(ring, upper_32_bits(seq));

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

548

amdgpu_ring_write(ring, SDMA_PKT_HEADER_OP(SDMA_OP_TRAP));

sys/dev/drm/amd/amdgpu/sdma_v4_0.c

549

amdgpu_ring_write(ring, SDMA_PKT_TRAP_INT_CONTEXT_INT_CONTEXT(0));

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

179

amdgpu_ring_write(ring, tmp);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

180

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

183

amdgpu_ring_write(ring, tmp);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

184

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

187

amdgpu_ring_write(ring, tmp);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

188

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

191

amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_TIMEOUT_STATUS, 0));

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

192

amdgpu_ring_write(ring, 0x8);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

194

amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_CNTL, 0));

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

195

amdgpu_ring_write(ring, 3);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

454

amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

455

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

456

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

457

amdgpu_ring_write(ring, addr & 0xffffffff);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

458

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

459

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xff);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

460

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

461

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

463

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

464

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

465

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

466

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

467

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

468

amdgpu_ring_write(ring, 2);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

492

amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

493

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

525

amdgpu_ring_write(ring, PACKET0(mmUVD_RBC_IB_BASE, 0));

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

526

amdgpu_ring_write(ring, ib->gpu_addr);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

527

amdgpu_ring_write(ring, PACKET0(mmUVD_RBC_IB_SIZE, 0));

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

528

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

538

amdgpu_ring_write(ring, PACKET0(mmUVD_NO_OP, 0));

sys/dev/drm/amd/amdgpu/uvd_v4_2.c

539

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

175

amdgpu_ring_write(ring, tmp);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

176

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

179

amdgpu_ring_write(ring, tmp);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

180

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

183

amdgpu_ring_write(ring, tmp);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

184

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

187

amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_TIMEOUT_STATUS, 0));

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

188

amdgpu_ring_write(ring, 0x8);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

190

amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_CNTL, 0));

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

191

amdgpu_ring_write(ring, 3);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

470

amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

471

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

472

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

473

amdgpu_ring_write(ring, addr & 0xffffffff);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

474

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

475

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xff);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

476

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

477

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

479

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

480

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

481

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

482

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

483

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

484

amdgpu_ring_write(ring, 2);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

508

amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

509

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

541

amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_64BIT_BAR_LOW, 0));

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

542

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

543

amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH, 0));

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

544

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

545

amdgpu_ring_write(ring, PACKET0(mmUVD_RBC_IB_SIZE, 0));

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

546

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

556

amdgpu_ring_write(ring, PACKET0(mmUVD_NO_OP, 0));

sys/dev/drm/amd/amdgpu/uvd_v5_0.c

557

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1010

amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_VMID, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1011

amdgpu_ring_write(ring, vmid);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1013

amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_64BIT_BAR_LOW, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1014

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1015

amdgpu_ring_write(ring, PACKET0(mmUVD_LMI_RBC_IB_64BIT_BAR_HIGH, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1016

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1017

amdgpu_ring_write(ring, PACKET0(mmUVD_RBC_IB_SIZE, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1018

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1032

amdgpu_ring_write(ring, HEVC_ENC_CMD_IB_VM);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1033

amdgpu_ring_write(ring, vmid);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1034

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1035

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1036

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1042

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1043

amdgpu_ring_write(ring, reg << 2);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1044

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1045

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1046

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1047

amdgpu_ring_write(ring, 0x8);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1055

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1056

amdgpu_ring_write(ring, mmVM_INVALIDATE_REQUEST << 2);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1057

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1058

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1059

amdgpu_ring_write(ring, PACKET0(mmUVD_GP_SCRATCH8, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1060

amdgpu_ring_write(ring, 1 << vmid); /* mask */

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1061

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1062

amdgpu_ring_write(ring, 0xC);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1070

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1071

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1072

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1073

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1074

amdgpu_ring_write(ring, PACKET0(mmUVD_GP_SCRATCH8, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1075

amdgpu_ring_write(ring, 0xffffffff); /* mask */

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1076

amdgpu_ring_write(ring, PACKET0(mmUVD_GP_SCRATCH9, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1077

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1078

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1079

amdgpu_ring_write(ring, 0xE);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1089

amdgpu_ring_write(ring, PACKET0(mmUVD_NO_OP, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1090

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1099

amdgpu_ring_write(ring, HEVC_ENC_CMD_WAIT_GE);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1100

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1101

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1102

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1107

amdgpu_ring_write(ring, HEVC_ENC_CMD_END);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1113

amdgpu_ring_write(ring, HEVC_ENC_CMD_UPDATE_PTB);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1114

amdgpu_ring_write(ring, vmid);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1115

amdgpu_ring_write(ring, pd_addr >> 12);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1117

amdgpu_ring_write(ring, HEVC_ENC_CMD_FLUSH_TLB);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

1118

amdgpu_ring_write(ring, vmid);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

183

amdgpu_ring_write(ring, HEVC_ENC_CMD_END);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

493

amdgpu_ring_write(ring, tmp);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

494

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

497

amdgpu_ring_write(ring, tmp);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

498

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

501

amdgpu_ring_write(ring, tmp);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

502

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

505

amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_TIMEOUT_STATUS, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

506

amdgpu_ring_write(ring, 0x8);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

508

amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_CNTL, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

509

amdgpu_ring_write(ring, 3);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

909

amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

910

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

911

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

912

amdgpu_ring_write(ring, addr & 0xffffffff);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

913

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

914

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xff);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

915

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

916

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

918

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA0, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

919

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

920

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_DATA1, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

921

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

922

amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

923

amdgpu_ring_write(ring, 2);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

939

amdgpu_ring_write(ring, HEVC_ENC_CMD_FENCE);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

940

amdgpu_ring_write(ring, addr);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

941

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

942

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

943

amdgpu_ring_write(ring, HEVC_ENC_CMD_TRAP);

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

977

amdgpu_ring_write(ring, PACKET0(mmUVD_CONTEXT_ID, 0));

sys/dev/drm/amd/amdgpu/uvd_v6_0.c

978

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1167

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1169

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1170

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1172

amdgpu_ring_write(ring, addr & 0xffffffff);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1173

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1175

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xff);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1176

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1178

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1180

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1182

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1183

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1185

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1186

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1188

amdgpu_ring_write(ring, 2);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1205

amdgpu_ring_write(ring, HEVC_ENC_CMD_FENCE);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1206

amdgpu_ring_write(ring, addr);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1207

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1208

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1209

amdgpu_ring_write(ring, HEVC_ENC_CMD_TRAP);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1243

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1245

amdgpu_ring_write(ring, 0xDEADBEEF);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1308

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1310

amdgpu_ring_write(ring, vmid);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1312

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1314

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1315

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1317

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1318

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1320

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1334

amdgpu_ring_write(ring, HEVC_ENC_CMD_IB_VM);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1335

amdgpu_ring_write(ring, vmid);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1336

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1337

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1338

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1346

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1348

amdgpu_ring_write(ring, reg << 2);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1349

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1351

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1352

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1354

amdgpu_ring_write(ring, 8);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1362

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1364

amdgpu_ring_write(ring, reg << 2);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1365

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1367

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1368

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1370

amdgpu_ring_write(ring, mask);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1371

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1373

amdgpu_ring_write(ring, 12);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1399

amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_NO_OP), 0));

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1400

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1406

amdgpu_ring_write(ring, HEVC_ENC_CMD_END);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1413

amdgpu_ring_write(ring, HEVC_ENC_CMD_REG_WAIT);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1414

amdgpu_ring_write(ring, reg << 2);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1415

amdgpu_ring_write(ring, mask);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1416

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1434

amdgpu_ring_write(ring, HEVC_ENC_CMD_REG_WRITE);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1435

amdgpu_ring_write(ring, reg << 2);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

1436

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

191

amdgpu_ring_write(ring, HEVC_ENC_CMD_END);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

558

amdgpu_ring_write(ring, tmp);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

559

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

563

amdgpu_ring_write(ring, tmp);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

564

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

568

amdgpu_ring_write(ring, tmp);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

569

amdgpu_ring_write(ring, 0xFFFFF);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

572

amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, j,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

574

amdgpu_ring_write(ring, 0x8);

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

576

amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, j,

sys/dev/drm/amd/amdgpu/uvd_v7_0.c

578

amdgpu_ring_write(ring, 3);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

843

amdgpu_ring_write(ring, VCE_CMD_IB_VM);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

844

amdgpu_ring_write(ring, vmid);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

845

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/vce_v3_0.c

846

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/vce_v3_0.c

847

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

853

amdgpu_ring_write(ring, VCE_CMD_UPDATE_PTB);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

854

amdgpu_ring_write(ring, vmid);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

855

amdgpu_ring_write(ring, pd_addr >> 12);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

857

amdgpu_ring_write(ring, VCE_CMD_FLUSH_TLB);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

858

amdgpu_ring_write(ring, vmid);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

859

amdgpu_ring_write(ring, VCE_CMD_END);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

867

amdgpu_ring_write(ring, VCE_CMD_WAIT_GE);

sys/dev/drm/amd/amdgpu/vce_v3_0.c

868

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/drm/amd/amdgpu/vce_v3_0.c

869

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/vce_v3_0.c

870

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

1005

amdgpu_ring_write(ring, VCE_CMD_REG_WRITE);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

1006

amdgpu_ring_write(ring, reg << 2);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

1007

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

957

amdgpu_ring_write(ring, VCE_CMD_IB_VM);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

958

amdgpu_ring_write(ring, vmid);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

959

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/vce_v4_0.c

960

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/vce_v4_0.c

961

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

969

amdgpu_ring_write(ring, VCE_CMD_FENCE);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

970

amdgpu_ring_write(ring, addr);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

971

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/vce_v4_0.c

972

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

973

amdgpu_ring_write(ring, VCE_CMD_TRAP);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

978

amdgpu_ring_write(ring, VCE_CMD_END);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

984

amdgpu_ring_write(ring, VCE_CMD_REG_WAIT);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

985

amdgpu_ring_write(ring, reg << 2);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

986

amdgpu_ring_write(ring, mask);

sys/dev/drm/amd/amdgpu/vce_v4_0.c

987

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1299

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1301

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1302

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1304

amdgpu_ring_write(ring, VCN_DEC_CMD_PACKET_START << 1);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1318

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1320

amdgpu_ring_write(ring, VCN_DEC_CMD_PACKET_END << 1);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1338

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1340

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1341

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1343

amdgpu_ring_write(ring, addr & 0xffffffff);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1344

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1346

amdgpu_ring_write(ring, upper_32_bits(addr) & 0xff);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1347

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1349

amdgpu_ring_write(ring, VCN_DEC_CMD_FENCE << 1);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1351

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1353

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1354

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1356

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1357

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1359

amdgpu_ring_write(ring, VCN_DEC_CMD_TRAP << 1);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1376

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1378

amdgpu_ring_write(ring, vmid);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1380

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1382

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1383

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1385

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1386

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1388

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1397

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1399

amdgpu_ring_write(ring, reg << 2);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1400

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1402

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1403

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1405

amdgpu_ring_write(ring, mask);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1406

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1408

amdgpu_ring_write(ring, VCN_DEC_CMD_REG_READ_COND_WAIT << 1);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1431

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1433

amdgpu_ring_write(ring, reg << 2);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1434

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1436

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1437

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1439

amdgpu_ring_write(ring, VCN_DEC_CMD_WRITE_REG << 1);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1508

amdgpu_ring_write(ring, VCN_ENC_CMD_FENCE);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1509

amdgpu_ring_write(ring, addr);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1510

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1511

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1512

amdgpu_ring_write(ring, VCN_ENC_CMD_TRAP);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1517

amdgpu_ring_write(ring, VCN_ENC_CMD_END);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1531

amdgpu_ring_write(ring, VCN_ENC_CMD_IB);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1532

amdgpu_ring_write(ring, vmid);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1533

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1534

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1535

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1542

amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WAIT);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1543

amdgpu_ring_write(ring, reg << 2);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1544

amdgpu_ring_write(ring, mask);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1545

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1563

amdgpu_ring_write(ring, VCN_ENC_CMD_REG_WRITE);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1564

amdgpu_ring_write(ring, reg << 2);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1565

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1622

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1624

amdgpu_ring_write(ring, 0x68e04);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1626

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE0));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1627

amdgpu_ring_write(ring, 0x80010000);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1641

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1643

amdgpu_ring_write(ring, 0x68e04);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1645

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE0));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1646

amdgpu_ring_write(ring, 0x00010000);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1664

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1666

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1668

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1670

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1672

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1674

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1676

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1678

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1680

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1682

amdgpu_ring_write(ring, 0x8);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1684

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1686

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1688

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1690

amdgpu_ring_write(ring, 0x01400200);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1692

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1694

amdgpu_ring_write(ring, seq);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1696

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1698

amdgpu_ring_write(ring, lower_32_bits(addr));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1700

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1702

amdgpu_ring_write(ring, upper_32_bits(addr));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1704

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1706

amdgpu_ring_write(ring, 0xffffffff);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1708

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1710

amdgpu_ring_write(ring, 0x3fbc);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1712

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1714

amdgpu_ring_write(ring, 0x1);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1717

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE7));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1718

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1735

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1737

amdgpu_ring_write(ring, (vmid | (vmid << 4)));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1739

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1741

amdgpu_ring_write(ring, (vmid | (vmid << 4)));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1743

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1745

amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1747

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1749

amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1751

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1753

amdgpu_ring_write(ring, ib->length_dw);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1755

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1757

amdgpu_ring_write(ring, lower_32_bits(ring->gpu_addr));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1759

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1761

amdgpu_ring_write(ring, upper_32_bits(ring->gpu_addr));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1763

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1765

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1767

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1769

amdgpu_ring_write(ring, 0x01400200);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1771

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1773

amdgpu_ring_write(ring, 0x2);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1775

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1777

amdgpu_ring_write(ring, 0x2);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1787

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1789

amdgpu_ring_write(ring, 0x01400200);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1791

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1793

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1795

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1799

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1800

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1803

amdgpu_ring_write(ring, reg_offset);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1804

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1807

amdgpu_ring_write(ring, mask);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1831

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1835

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1836

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1839

amdgpu_ring_write(ring, reg_offset);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1840

amdgpu_ring_write(ring,

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1843

amdgpu_ring_write(ring, val);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1853

amdgpu_ring_write(ring, PACKETJ(0, 0, 0, PACKETJ_TYPE6));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1854

amdgpu_ring_write(ring, 0);

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1993

amdgpu_ring_write(ring, PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_NO_OP), 0));

sys/dev/drm/amd/amdgpu/vcn_v1_0.c

1994

amdgpu_ring_write(ring, 0);