Symbol: AR_SETBITS
sys/dev/ic/ar5008.c
1945
AR_SETBITS(sc, AR_PHY_CCK_DETECT,
sys/dev/ic/ar5008.c
1973
AR_SETBITS(sc, AR_PHY_ANALOG_SWAP, AR_PHY_SWAP_ALT_CHAIN);
sys/dev/ic/ar5008.c
2081
AR_SETBITS(sc, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
sys/dev/ic/ar5008.c
2121
AR_SETBITS(sc, AR_PHY_AGC_CONTROL, agc_nfcal);
sys/dev/ic/ar5008.c
2129
AR_SETBITS(sc, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_ENABLE_NF);
sys/dev/ic/ar5008.c
2130
AR_SETBITS(sc, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
sys/dev/ic/ar5008.c
2131
AR_SETBITS(sc, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
sys/dev/ic/ar5008.c
2138
AR_SETBITS(sc, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
sys/dev/ic/ar5008.c
2162
AR_SETBITS(sc, AR_PHY_TIMING_CTRL4_0, AR_PHY_TIMING_CTRL4_DO_CAL);
sys/dev/ic/ar5008.c
2243
AR_SETBITS(sc, AR_PHY_TIMING_CTRL4_0,
sys/dev/ic/ar5008.c
2294
AR_SETBITS(sc, AR_PHY_NEW_ADC_DC_GAIN_CORR(0),
sys/dev/ic/ar5008.c
2349
AR_SETBITS(sc, AR_PHY_NEW_ADC_DC_GAIN_CORR(0),
sys/dev/ic/ar5008.c
2610
AR_SETBITS(sc, AR_DIAG_SW, AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT);
sys/dev/ic/ar5008.c
2889
AR_SETBITS(sc, AR_PHY_SFCORR_LOW,
sys/dev/ic/ar5008.c
415
AR_SETBITS(sc, AR7010_GPIO_OE, 1 << pin);
sys/dev/ic/ar5008.c
460
AR_SETBITS(sc, AR_GPIO_INPUT_EN_VAL, AR_GPIO_INPUT_EN_VAL_RFSILENT_BB);
sys/dev/ic/ar5008.c
465
AR_SETBITS(sc, AR_PHY_TEST, AR_PHY_TEST_RFSILENT_BB);
sys/dev/ic/ar5008.c
467
AR_SETBITS(sc, AR_GPIO_INTR_POL,
sys/dev/ic/ar5416.c
343
AR_SETBITS(sc, AR_PHY_AGC_CONTROL,
sys/dev/ic/ar5416.c
347
AR_SETBITS(sc, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL);
sys/dev/ic/ar5416.c
358
AR_SETBITS(sc, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
sys/dev/ic/ar5416.c
698
AR_SETBITS(sc, AR_PHY_TIMING_CTRL4_0,
sys/dev/ic/ar9003.c
1883
AR_SETBITS(sc, AR_PHY_CCK_DETECT,
sys/dev/ic/ar9003.c
1911
AR_SETBITS(sc, AR_PHY_ANALOG_SWAP, AR_PHY_SWAP_ALT_CHAIN);
sys/dev/ic/ar9003.c
2015
AR_SETBITS(sc, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
sys/dev/ic/ar9003.c
2052
AR_SETBITS(sc, AR_PHY_AGC_CONTROL, agc_nfcal);
sys/dev/ic/ar9003.c
2060
AR_SETBITS(sc, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_ENABLE_NF);
sys/dev/ic/ar9003.c
2061
AR_SETBITS(sc, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NO_UPDATE_NF);
sys/dev/ic/ar9003.c
2062
AR_SETBITS(sc, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
sys/dev/ic/ar9003.c
2069
AR_SETBITS(sc, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_NF);
sys/dev/ic/ar9003.c
2099
AR_SETBITS(sc, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL);
sys/dev/ic/ar9003.c
2128
AR_SETBITS(sc, AR_PHY_TIMING4, AR_PHY_TIMING4_DO_CAL);
sys/dev/ic/ar9003.c
2131
AR_SETBITS(sc, AR_PHY_65NM_CH0_THERM,
sys/dev/ic/ar9003.c
2133
AR_SETBITS(sc, AR_PHY_65NM_CH0_THERM,
sys/dev/ic/ar9003.c
2208
AR_SETBITS(sc, AR_PHY_RX_IQCAL_CORR_B(0),
sys/dev/ic/ar9003.c
2349
AR_SETBITS(sc, AR_PHY_TX_IQCAL_START, AR_PHY_TX_IQCAL_START_DO_CAL);
sys/dev/ic/ar9003.c
2375
AR_SETBITS(sc, AR_PHY_CHAN_INFO_MEMORY,
sys/dev/ic/ar9003.c
2401
AR_SETBITS(sc, AR_PHY_TX_IQCAL_CONTROL_3,
sys/dev/ic/ar9003.c
2403
AR_SETBITS(sc, AR_PHY_RX_IQCAL_CORR_B(0),
sys/dev/ic/ar9003.c
2451
AR_SETBITS(sc, AR_PHY_PAPRD_CTRL0_B(i),
sys/dev/ic/ar9003.c
2944
AR_SETBITS(sc, AR_PHY_PAPRD_CTRL0_B(chain),
sys/dev/ic/ar9003.c
2978
AR_SETBITS(sc, AR_PHY_CHAN_INFO_MEMORY, AR_PHY_CHAN_INFO_TAB_S2_READ);
sys/dev/ic/ar9003.c
3178
AR_SETBITS(sc, AR_DIAG_SW, AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT);
sys/dev/ic/ar9003.c
3306
AR_SETBITS(sc, AR_PHY_SFCORR_LOW,
sys/dev/ic/ar9003.c
562
AR_SETBITS(sc, AR_GPIO_INPUT_EN_VAL, AR_GPIO_INPUT_EN_VAL_RFSILENT_BB);
sys/dev/ic/ar9003.c
567
AR_SETBITS(sc, AR_PHY_TEST, AR_PHY_TEST_RFSILENT_BB);
sys/dev/ic/ar9003.c
569
AR_SETBITS(sc, AR_GPIO_INTR_POL,
sys/dev/ic/ar9280.c
496
AR_SETBITS(sc, AR_PHY_TIMING_CTRL4_0,
sys/dev/ic/ar9285.c
434
AR_SETBITS(sc, AR_PHY(2), 1 << 27);
sys/dev/ic/ar9285.c
436
AR_SETBITS(sc, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC);
sys/dev/ic/ar9285.c
437
AR_SETBITS(sc, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1);
sys/dev/ic/ar9285.c
438
AR_SETBITS(sc, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I);
sys/dev/ic/ar9285.c
439
AR_SETBITS(sc, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDDACIF);
sys/dev/ic/ar9285.c
473
AR_SETBITS(sc, AR9285_AN_RF2G6, AR9285_AN_RF2G6_OFFS(i));
sys/dev/ic/ar9285.c
477
AR_SETBITS(sc, AR9285_AN_RF2G6,
sys/dev/ic/ar9285.c
485
AR_SETBITS(sc, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP);
sys/dev/ic/ar9285.c
489
AR_SETBITS(sc, AR9285_AN_RF2G3, AR9285_AN_RF2G3_PDVCCOMP);
sys/dev/ic/ar9285.c
495
AR_SETBITS(sc, AR9285_AN_RF2G6, 1);
sys/dev/ic/ar9285.c
531
AR_SETBITS(sc, AR_PHY(2), 1 << 27);
sys/dev/ic/ar9285.c
533
AR_SETBITS(sc, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC);
sys/dev/ic/ar9285.c
534
AR_SETBITS(sc, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDRXTXBB1);
sys/dev/ic/ar9285.c
535
AR_SETBITS(sc, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I);
sys/dev/ic/ar9285.c
536
AR_SETBITS(sc, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDDACIF);
sys/dev/ic/ar9285.c
578
AR_SETBITS(sc, AR9285_AN_RF2G6, 1);
sys/dev/ic/ar9285.c
600
AR_SETBITS(sc, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
sys/dev/ic/ar9285.c
602
AR_SETBITS(sc, AR_PHY_CL_CAL_CTL, AR_PHY_PARALLEL_CAL_ENABLE);
sys/dev/ic/ar9285.c
603
AR_SETBITS(sc, AR_PHY_TURBO, AR_PHY_FC_DYN2040_EN);
sys/dev/ic/ar9285.c
607
AR_SETBITS(sc, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL);
sys/dev/ic/ar9285.c
621
AR_SETBITS(sc, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_FLTR_CAL);
sys/dev/ic/ar9285.c
622
AR_SETBITS(sc, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_CAL_ENABLE);
sys/dev/ic/ar9285.c
623
AR_SETBITS(sc, AR_PHY_AGC_CONTROL, AR_PHY_AGC_CONTROL_CAL);
sys/dev/ic/ar9285.c
632
AR_SETBITS(sc, AR_PHY_ADC_CTL, AR_PHY_ADC_CTL_OFF_PWDADC);
sys/dev/ic/ar9287.c
543
AR_SETBITS(sc, AR_PHY_TX_PWRCTRL9, AR_PHY_TX_PWRCTRL9_RES_DC_REMOVAL);
sys/dev/ic/ar9287.c
593
AR_SETBITS(sc, AR_MAC_PCU_ASYNC_FIFO_REG3,
sys/dev/ic/ar9287.c
595
AR_SETBITS(sc, AR_PHY_MODE, AR_PHY_MODE_ASYNCFIFO);
sys/dev/ic/ar9287.c
598
AR_SETBITS(sc, AR_MAC_PCU_ASYNC_FIFO_REG3,
sys/dev/ic/ar9287.c
619
AR_SETBITS(sc, AR_MAC_PCU_LOGIC_ANALYZER,
sys/dev/ic/ar9287.c
626
AR_SETBITS(sc, AR_PCU_MISC_MODE2, AR_PCU_MISC_MODE2_ENABLE_AGGWEP);
sys/dev/ic/ar9380.c
279
AR_SETBITS(sc, AR_PHY_65NM_CH0_SYNTH4,
sys/dev/ic/ar9380.c
454
AR_SETBITS(sc, AR_RTC_REG_CONTROL1,
sys/dev/ic/ar9380.c
457
AR_SETBITS(sc, AR_RTC_SLEEP_CLK, AR_RTC_FORCE_SWREG_PRD);
sys/dev/ic/ar9380.c
630
AR_SETBITS(sc, AR_PHY_TIMING4, AR_PHY_TIMING4_ENABLE_SPUR_FILTER);
sys/dev/ic/ar9380.c
646
AR_SETBITS(sc, AR_PHY_TIMING4, AR_PHY_TIMING4_ENABLE_SPUR_RSSI);
sys/dev/ic/ar9380.c
662
AR_SETBITS(sc, AR_PHY_TIMING4,
sys/dev/ic/athn.c
1145
AR_SETBITS(sc, sc->gpio_input_en_off,
sys/dev/ic/athn.c
1156
AR_SETBITS(sc, sc->gpio_input_en_off,
sys/dev/ic/athn.c
1194
AR_SETBITS(sc, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE);
sys/dev/ic/athn.c
1777
AR_SETBITS(sc, AR_AHB_MODE, AR_AHB_PREFETCH_RD_EN);
sys/dev/ic/athn.c
1852
AR_SETBITS(sc, AR_DIAG_SW, AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT);
sys/dev/ic/athn.c
1913
AR_SETBITS(sc, AR_TIMER_MODE, AR_QUIET_TIMER_EN);
sys/dev/ic/athn.c
1917
AR_SETBITS(sc, AR_DIAG_SW, AR_DIAG_FORCE_CH_IDLE_HIGH);
sys/dev/ic/athn.c
1987
AR_SETBITS(sc, AR_QMISC(ATHN_QID_BEACON),
sys/dev/ic/athn.c
1990
AR_SETBITS(sc, AR_DMISC(ATHN_QID_BEACON),
sys/dev/ic/athn.c
2001
AR_SETBITS(sc, AR_QMISC(ATHN_QID_CAB),
sys/dev/ic/athn.c
2004
AR_SETBITS(sc, AR_DMISC(ATHN_QID_CAB),
sys/dev/ic/athn.c
2009
AR_SETBITS(sc, AR_QMISC(ATHN_QID_PSPOLL),
sys/dev/ic/athn.c
2013
AR_SETBITS(sc, AR_DMISC(ATHN_QID_UAPSD),
sys/dev/ic/athn.c
2086
AR_SETBITS(sc, AR_TIMER_MODE,
sys/dev/ic/athn.c
2146
AR_SETBITS(sc, AR_CFG, AR_CFG_AP_ADHOC_INDICATION);
sys/dev/ic/athn.c
2317
AR_SETBITS(sc, sc->gpio_input_en_off, AR_GPIO_JTAG_DISABLE);
sys/dev/ic/athn.c
2341
AR_SETBITS(sc, AR_PCU_MISC_MODE2,
sys/dev/ic/athn.c
2396
AR_SETBITS(sc, AR_IMR_S2, AR_IMR_S2_GTT);
sys/dev/ic/athn.c
2412
AR_SETBITS(sc, AR_PCU_MISC, AR_PCU_MIC_NEW_LOC_ENA);
sys/dev/ic/athn.c
2421
AR_SETBITS(sc, AR_STA_ID1, AR_STA_ID1_PRESERVE_SEQNUM);
sys/dev/ic/athn.c
3125
AR_SETBITS(sc, AR_DIAG_SW, AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT);
sys/dev/ic/athn.c
521
AR_SETBITS(sc, AR_DIAG_SW, AR_DIAG_ENCRYPT_DIS | AR_DIAG_DECRYPT_DIS);
sys/dev/ic/athn.c
539
AR_SETBITS(sc, AR_RXCFG, AR_RXCFG_ZLFDMA);
sys/dev/ic/athn.c
713
AR_SETBITS(sc, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN);
sys/dev/ic/athn.c
723
AR_SETBITS(sc, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_EN);
sys/dev/ic/athn.c
738
AR_SETBITS(sc, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
sys/dev/ic/athn.c
819
AR_SETBITS(sc, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA);
sys/dev/ic/athn.c
926
AR_SETBITS(sc, AR_DIAG_SW, AR_DIAG_RX_DIS | AR_DIAG_RX_ABORT);