sys/arch/alpha/alpha/mcclock.c

76

mc146818_write(sc, MC_REGA, MC_BASE_32_KHz | MC_RATE_1024_Hz);

sys/arch/amd64/isa/clock.c

310

mc146818_write(NULL, MC_REGA, MC_BASE_32_KHz | MC_RATE_128_Hz);

sys/arch/amd64/isa/clock.c

581

mc146818_write(NULL, MC_REGA,

sys/arch/amd64/isa/clock.c

584

mc146818_write(NULL, MC_REGA,

sys/arch/i386/isa/clock.c

452

mc146818_write(NULL, MC_REGA, MC_BASE_32_KHz | MC_RATE_128_Hz);

sys/arch/i386/isa/clock.c

665

mc146818_write(NULL, MC_REGA,

sys/arch/i386/isa/clock.c

668

mc146818_write(NULL, MC_REGA,

sys/arch/loongson/dev/mcclock.c

63

mc146818_write(sc, MC_REGA, MC_BASE_32_KHz | MC_RATE_NONE);

sys/dev/ic/mc146818reg.h

168

while (mc146818_read(sc, MC_REGA) & MC_REGA_UIP) \

usr.sbin/vmd/mc146818.c

215

period = rtc.regs[MC_REGA] & MC_RATE_MASK;

usr.sbin/vmd/mc146818.c

239

rtc.regs[MC_REGA] = data;

usr.sbin/vmd/mc146818.c

240

if ((rtc.regs[MC_REGA] ^ data) & 0x0f)

usr.sbin/vmd/mc146818.c

309

case MC_REGA: