sys/dev/pci/drm/i915/gt/intel_engine_cs.c

457

BUILD_BUG_ON(MAX_ENGINE_CLASS >= BIT(GEN11_ENGINE_CLASS_WIDTH));

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

465

if (GEM_DEBUG_WARN_ON(info->class > MAX_ENGINE_CLASS))

sys/dev/pci/drm/i915/gt/intel_engine_cs.c

973

for (class = 0; class < MAX_ENGINE_CLASS + 1; ++class) {

sys/dev/pci/drm/i915/gt/intel_gt_irq.c

135

if (class <= MAX_ENGINE_CLASS && instance <= MAX_ENGINE_INSTANCE) {

sys/dev/pci/drm/i915/gt/intel_gt_types.h

206

struct intel_engine_cs *engine_class[MAX_ENGINE_CLASS + 1]

sys/dev/pci/drm/i915/gt/selftest_execlists.c

3888

for (class = 0; class <= MAX_ENGINE_CLASS; class++) {

sys/dev/pci/drm/i915/gt/selftest_execlists.c

4006

for (class = 0; class <= MAX_ENGINE_CLASS; class++) {

sys/dev/pci/drm/i915/gt/selftest_execlists.c

4168

for (class = 0; class <= MAX_ENGINE_CLASS; class++) {

sys/dev/pci/drm/i915/gt/selftest_execlists.c

4315

for (class = 0; class <= MAX_ENGINE_CLASS; class++) {

sys/dev/pci/drm/i915/gt/selftest_execlists.c

4450

for (class = 0; class <= MAX_ENGINE_CLASS; class++) {

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

573

for (engine_class = 0; engine_class <= MAX_ENGINE_CLASS; ++engine_class) {

sys/dev/pci/drm/i915/gt/uc/intel_guc_ads.c

650

for (engine_class = 0; engine_class <= MAX_ENGINE_CLASS; ++engine_class) {

sys/dev/pci/drm/i915/gt/uc/intel_guc_fwif.h

185

BUILD_BUG_ON(ARRAY_SIZE(engine_class_guc_class_map) != MAX_ENGINE_CLASS + 1);

sys/dev/pci/drm/i915/gt/uc/intel_guc_fwif.h

186

GEM_BUG_ON(class > MAX_ENGINE_CLASS);

sys/dev/pci/drm/i915/gt/uc/selftest_guc_multi_lrc.c

157

for (class = 0; class < MAX_ENGINE_CLASS + 1; ++class) {

sys/dev/pci/drm/i915/i915_gpu_error.h

229

atomic_t reset_engine_count[MAX_ENGINE_CLASS];