sys/dev/pci/drm/i915/display/intel_cdclk.c

1119

intel_de_rmw(display, LCPLL1_CTL,

sys/dev/pci/drm/i915/display/intel_cdclk.c

1122

if (intel_de_wait_for_set(display, LCPLL1_CTL, LCPLL_PLL_LOCK, 5))

sys/dev/pci/drm/i915/display/intel_cdclk.c

1133

intel_de_rmw(display, LCPLL1_CTL,

sys/dev/pci/drm/i915/display/intel_cdclk.c

1136

if (intel_de_wait_for_clear(display, LCPLL1_CTL, LCPLL_PLL_LOCK, 1))

sys/dev/pci/drm/i915/display/intel_cdclk.c

980

val = intel_de_read(display, LCPLL1_CTL);

sys/dev/pci/drm/i915/display/intel_dpll_mgr.c

1343

.ctl = LCPLL1_CTL,

sys/dev/pci/drm/i915/gvt/display.c

400

vgpu_vreg_t(vgpu, LCPLL1_CTL) =

sys/dev/pci/drm/i915/gvt/handlers.c

2630

MMIO_DH(LCPLL1_CTL, D_SKL_PLUS, NULL, skl_lcpll_write);

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

938

MMIO_D(LCPLL1_CTL);