sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

295

case LANE_COUNT_TWO:

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

3467

case LANE_COUNT_TWO:

sys/dev/pci/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

429

case LANE_COUNT_TWO:

sys/dev/pci/drm/amd/display/dc/dcn201/dcn201_link_encoder.c

63

if (!value1 && !value2 && link_settings->lane_count > LANE_COUNT_TWO)

sys/dev/pci/drm/amd/display/dc/dcn201/dcn201_link_encoder.c

64

link_settings->lane_count = LANE_COUNT_TWO;

sys/dev/pci/drm/amd/display/dc/dio/dcn20/dcn20_link_encoder.c

280

link_settings->lane_count = MIN(LANE_COUNT_TWO, link_settings->lane_count);

sys/dev/pci/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

659

link_settings->lane_count = MIN(LANE_COUNT_TWO, link_settings->lane_count);

sys/dev/pci/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

681

link_settings->lane_count = MIN(LANE_COUNT_TWO, link_settings->lane_count);

sys/dev/pci/drm/amd/display/dc/dio/dcn32/dcn32_dio_link_encoder.c

201

MIN(LANE_COUNT_TWO, link_settings->lane_count);

sys/dev/pci/drm/amd/display/dc/hpo/dcn31/dcn31_hpo_dp_link_encoder.c

73

NUM_LANES, num_lanes == LANE_COUNT_ONE ? 0 : num_lanes == LANE_COUNT_TWO ? 1 : 3);

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

485

return LANE_COUNT_TWO;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

486

case LANE_COUNT_TWO:

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

534

return LANE_COUNT_TWO;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

535

case LANE_COUNT_TWO:

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

672

cur->lane_count = LANE_COUNT_TWO;

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

80

{LANE_COUNT_TWO, LINK_RATE_UHBR20},

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

82

{LANE_COUNT_TWO, LINK_RATE_UHBR13_5},

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

85

{LANE_COUNT_TWO, LINK_RATE_UHBR10},

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

88

{LANE_COUNT_TWO, LINK_RATE_HIGH3},

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

90

{LANE_COUNT_TWO, LINK_RATE_HIGH2},

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

95

{LANE_COUNT_TWO, LINK_RATE_HIGH},

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_capability.c

96

{LANE_COUNT_TWO, LINK_RATE_LOW},

sys/dev/pci/drm/amd/display/dc/link/protocols/link_dp_training.c

448

else if (ln_count >= LANE_COUNT_TWO && !dpcd_lane_status[1].bits.CR_DONE_0)