Symbol: JH7110_PLL0_PREDIV_OFF
sys/arch/riscv64/dev/stfclock.c
686
reg = regmap_read_4(sc->sc_rm, base + JH7110_PLL0_PREDIV_OFF);
sys/arch/riscv64/dev/stfclock.c
767
reg = regmap_read_4(sc->sc_rm, base + JH7110_PLL0_PREDIV_OFF);
sys/arch/riscv64/dev/stfclock.c
770
regmap_write_4(sc->sc_rm, base + JH7110_PLL0_PREDIV_OFF, reg);