Symbol: JH7100_CLK_PLL2_OUT
sys/arch/riscv64/dev/stfclock.c
345
case JH7100_CLK_PLL2_OUT:
sys/arch/riscv64/dev/stfclock.c
367
parent = JH7100_CLK_PLL2_OUT;
sys/arch/riscv64/dev/stfclock.c
380
parent = JH7100_CLK_PLL2_OUT;
sys/arch/riscv64/dev/stfclock.c
390
parent = mux ? JH7100_CLK_PLL2_OUT : JH7100_CLK_OSC_SYS;