Symbol: JH7100_CLK_PLL0_OUT
sys/arch/riscv64/dev/stfclock.c
339
case JH7100_CLK_PLL0_OUT:
sys/arch/riscv64/dev/stfclock.c
361
parent = JH7100_CLK_PLL0_OUT;
sys/arch/riscv64/dev/stfclock.c
377
parent = JH7100_CLK_PLL0_OUT;
sys/arch/riscv64/dev/stfclock.c
386
parent = mux ? JH7100_CLK_PLL0_OUT : JH7100_CLK_OSC_SYS;