sys/arch/riscv64/dev/stfclock.c

334

case JH7100_CLK_OSC_SYS:

sys/arch/riscv64/dev/stfclock.c

340

parent = JH7100_CLK_OSC_SYS;

sys/arch/riscv64/dev/stfclock.c

343

parent = JH7100_CLK_OSC_SYS;

sys/arch/riscv64/dev/stfclock.c

358

parent = JH7100_CLK_OSC_SYS;

sys/arch/riscv64/dev/stfclock.c

374

parent = JH7100_CLK_OSC_SYS;

sys/arch/riscv64/dev/stfclock.c

386

parent = mux ? JH7100_CLK_PLL0_OUT : JH7100_CLK_OSC_SYS;

sys/arch/riscv64/dev/stfclock.c

390

parent = mux ? JH7100_CLK_PLL2_OUT : JH7100_CLK_OSC_SYS;

sys/arch/riscv64/dev/stfclock.c

393

parent = mux ? JH7100_CLK_OSC_AUD : JH7100_CLK_OSC_SYS;