AR5K_EEPROM_N_MODES
u_int32_t ah_antenna[AR5K_EEPROM_N_MODES][HAL_ANT_MAX];
u_int16_t ee_i_cal[AR5K_EEPROM_N_MODES];
u_int16_t ee_q_cal[AR5K_EEPROM_N_MODES];
u_int16_t ee_fixed_bias[AR5K_EEPROM_N_MODES];
u_int16_t ee_xr_power[AR5K_EEPROM_N_MODES];
u_int16_t ee_switch_settling[AR5K_EEPROM_N_MODES];
u_int16_t ee_ant_tx_rx[AR5K_EEPROM_N_MODES];
u_int16_t ee_ant_control[AR5K_EEPROM_N_MODES][AR5K_EEPROM_N_PCDAC];
u_int16_t ee_ob[AR5K_EEPROM_N_MODES][AR5K_EEPROM_N_OBDB];
u_int16_t ee_db[AR5K_EEPROM_N_MODES][AR5K_EEPROM_N_OBDB];
u_int16_t ee_tx_end2xlna_enable[AR5K_EEPROM_N_MODES];
u_int16_t ee_tx_end2xpa_disable[AR5K_EEPROM_N_MODES];
u_int16_t ee_tx_frm2xpa_enable[AR5K_EEPROM_N_MODES];
u_int16_t ee_thr_62[AR5K_EEPROM_N_MODES];
u_int16_t ee_xlna_gain[AR5K_EEPROM_N_MODES];
u_int16_t ee_xpd[AR5K_EEPROM_N_MODES];
u_int16_t ee_x_gain[AR5K_EEPROM_N_MODES];
u_int16_t ee_i_gain[AR5K_EEPROM_N_MODES];
u_int16_t ee_margin_tx_rx[AR5K_EEPROM_N_MODES];
u_int16_t ee_false_detect[AR5K_EEPROM_N_MODES];
u_int16_t ee_cal_pier[AR5K_EEPROM_N_MODES][AR5K_EEPROM_N_2GHZ_CHAN];
u_int16_t ee_channel[AR5K_EEPROM_N_MODES][AR5K_EEPROM_MAX_CHAN];
int16_t ee_noise_floor_thr[AR5K_EEPROM_N_MODES];
int8_t ee_adc_desired_size[AR5K_EEPROM_N_MODES];
int8_t ee_pga_desired_size[AR5K_EEPROM_N_MODES];