sys/arch/arm/cortex/ampintc.c

80

#define ICD_ICR_TRIG_LEVEL(i) (0x0 << (IRQ_TO_REG16BIT(i) * 2))

sys/arch/arm/cortex/ampintc.c

81

#define ICD_ICR_TRIG_EDGE(i) (0x2 << (IRQ_TO_REG16BIT(i) * 2))

sys/arch/arm/cortex/ampintc.c

82

#define ICD_ICR_TRIG_MASK(i) (0x2 << (IRQ_TO_REG16BIT(i) * 2))

sys/arch/arm64/dev/agintc.c

91

#define GICD_ICFGR_TRIG_LEVEL(i) (0x0 << (IRQ_TO_REG16BIT(i) * 2))

sys/arch/arm64/dev/agintc.c

92

#define GICD_ICFGR_TRIG_EDGE(i) (0x2 << (IRQ_TO_REG16BIT(i) * 2))

sys/arch/arm64/dev/agintc.c

93

#define GICD_ICFGR_TRIG_MASK(i) (0x2 << (IRQ_TO_REG16BIT(i) * 2))

sys/arch/arm64/dev/ampintc.c

82

#define ICD_ICR_TRIG_LEVEL(i) (0x0 << (IRQ_TO_REG16BIT(i) * 2))

sys/arch/arm64/dev/ampintc.c

83

#define ICD_ICR_TRIG_EDGE(i) (0x2 << (IRQ_TO_REG16BIT(i) * 2))

sys/arch/arm64/dev/ampintc.c

84

#define ICD_ICR_TRIG_MASK(i) (0x2 << (IRQ_TO_REG16BIT(i) * 2))