sys/arch/alpha/pci/sio_pic.c

341

if (bus_space_map(sio_iot, IO_ICU1, 2, 0, &sio_ioh_icu1) ||

sys/arch/amd64/amd64/i8259.c

111

outb(IO_ICU1, 0x11); /* reset; program device, four bytes */

sys/arch/amd64/amd64/i8259.c

113

outb(IO_ICU1+1, ICU_OFFSET); /* starting at this vector index */

sys/arch/amd64/amd64/i8259.c

114

outb(IO_ICU1+1, 1 << IRQ_SLAVE); /* slave on line 2 */

sys/arch/amd64/amd64/i8259.c

115

outb(IO_ICU1+1, 1); /* 8086 mode */

sys/arch/amd64/amd64/i8259.c

116

outb(IO_ICU1+1, 0xff); /* leave interrupts masked */

sys/arch/amd64/amd64/i8259.c

117

outb(IO_ICU1, 0x68); /* special mask mode (if available) */

sys/arch/amd64/amd64/i8259.c

118

outb(IO_ICU1, 0x0a); /* Read IRR by default. */

sys/arch/amd64/amd64/i8259.c

139

port = IO_ICU1 + 1;

sys/arch/amd64/amd64/i8259.c

158

port = IO_ICU1 + 1;

sys/arch/amd64/amd64/i8259.c

179

outb(IO_ICU1 + 1, i8259_imen);

sys/arch/amd64/include/i8259.h

73

outb %al,$IO_ICU1

sys/arch/amd64/include/i8259.h

79

outb %al,$IO_ICU1

sys/arch/i386/include/i8259.h

100

outb %al,$IO_ICU1

sys/arch/i386/include/i8259.h

110

outb %al,$IO_ICU1

sys/arch/i386/include/i8259.h

50

#define SET_ICUS() (outb(IO_ICU1 + 1, imen), outb(IO_ICU2 + 1, imen >> 8))

sys/arch/i386/include/i8259.h

89

outb %al,$IO_ICU1

sys/arch/i386/isa/isa_machdep.c

174

outb(IO_ICU1, 0x11); /* reset; program device, four bytes */

sys/arch/i386/isa/isa_machdep.c

175

outb(IO_ICU1+1, ICU_OFFSET); /* starting at this vector index */

sys/arch/i386/isa/isa_machdep.c

176

outb(IO_ICU1+1, 1 << IRQ_SLAVE); /* slave on line 2 */

sys/arch/i386/isa/isa_machdep.c

178

outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */

sys/arch/i386/isa/isa_machdep.c

180

outb(IO_ICU1+1, 1); /* 8086 mode */

sys/arch/i386/isa/isa_machdep.c

182

outb(IO_ICU1+1, 0xff); /* leave interrupts masked */

sys/arch/i386/isa/isa_machdep.c

183

outb(IO_ICU1, 0x68); /* special mask mode (if available) */

sys/arch/i386/isa/isa_machdep.c

184

outb(IO_ICU1, 0x0a); /* Read IRR by default. */

sys/arch/i386/isa/isa_machdep.c

186

outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */

sys/arch/loongson/loongson/generic2e_machdep.c

248

REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW3) =

sys/arch/loongson/loongson/generic2e_machdep.c

250

ocw1 = REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW3);

sys/arch/loongson/loongson/generic2e_machdep.c

532

REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_ICW1) =

sys/arch/loongson/loongson/generic2e_machdep.c

534

REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_ICW2) = ICW2_VECTOR(0);

sys/arch/loongson/loongson/generic2e_machdep.c

535

REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_ICW3) = ICW3_CASCADE(2);

sys/arch/loongson/loongson/generic2e_machdep.c

536

REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_ICW4) = ICW4_8086;

sys/arch/loongson/loongson/generic2e_machdep.c

538

REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW1) = 0xff;

sys/arch/loongson/loongson/generic2e_machdep.c

540

REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW3) =

sys/arch/loongson/loongson/generic2e_machdep.c

543

REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW3) = OCW3_SELECT | OCW3_RR;

sys/arch/loongson/loongson/generic3a_machdep.c

406

REGVAL8(HTB_IO_BASE + IO_ICU1 + PIC_ICW1) = ICW1_SELECT | ICW1_IC4;

sys/arch/loongson/loongson/generic3a_machdep.c

407

REGVAL8(HTB_IO_BASE + IO_ICU1 + PIC_ICW2) = ICW2_VECTOR(0);

sys/arch/loongson/loongson/generic3a_machdep.c

408

REGVAL8(HTB_IO_BASE + IO_ICU1 + PIC_ICW3) = ICW3_CASCADE(IRQ_CASCADE);

sys/arch/loongson/loongson/generic3a_machdep.c

409

REGVAL8(HTB_IO_BASE + IO_ICU1 + PIC_ICW4) = ICW4_8086;

sys/arch/loongson/loongson/generic3a_machdep.c

410

REGVAL8(HTB_IO_BASE + IO_ICU1 + PIC_OCW1) = 0xff;

sys/arch/loongson/loongson/generic3a_machdep.c

477

REGVAL8(HTB_IO_BASE + IO_ICU1 + PIC_OCW2) =

sys/arch/loongson/loongson/generic3a_machdep.c

491

REGVAL8(HTB_IO_BASE + IO_ICU1 + PIC_OCW1) = imr1;

sys/arch/loongson/loongson/isa_machdep.c

67

REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + 1) = imr1;

sys/arch/loongson/loongson/isa_machdep.c

79

REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + PIC_OCW2) =

sys/arch/loongson/loongson/yeeloong_machdep.c

445

imr1 = 0xff & ~REGVAL8(BONITO_PCIIO_BASE + IO_ICU1 + 1);

sys/arch/loongson/loongson/yeeloong_machdep.c

457

isr1 = 0xff & REGVAL8(BONITO_PCIIO_BASE + IO_ICU1);

usr.sbin/vmd/i8259.c

593

case IO_ICU1:

usr.sbin/vmd/i8259.c

594

case IO_ICU1 + 1:

usr.sbin/vmd/i8259.c

606

if (port == IO_ICU1 + 1 || port == IO_ICU2 + 1)

usr.sbin/vmd/i8259.c

632

case IO_ICU1:

usr.sbin/vmd/i8259.c

633

case IO_ICU1 + 1:

usr.sbin/vmd/i8259.c

645

if (port == IO_ICU1 + 1 || port == IO_ICU2 + 1)

usr.sbin/vmd/x86_vm.c

385

ioports_map[IO_ICU1] = vcpu_exit_i8259;

usr.sbin/vmd/x86_vm.c

386

ioports_map[IO_ICU1 + 1] = vcpu_exit_i8259;