INTR_ENABLED
err = hv_intr_setenabled(sysino, INTR_ENABLED);
cbus_intr_setenabled(sc->sc_bustag, sc->sc_tx_ino, INTR_ENABLED);
cbus_intr_setenabled(sc->sc_bustag, sc->sc_rx_ino, INTR_ENABLED);
uint64_t state = stop ? INTR_DISABLED : INTR_ENABLED;
vbus_intr_setenabled(sc->sc_bustag, sc->sc_sysino, INTR_ENABLED);
cbus_intr_setenabled(sc->sc_bustag, ca->ca_tx_ino, INTR_ENABLED);
cbus_intr_setenabled(sc->sc_bustag, ca->ca_rx_ino, INTR_ENABLED);
cbus_intr_setenabled(sc->sc_bustag, sc->sc_tx_ino, INTR_ENABLED);
cbus_intr_setenabled(sc->sc_bustag, sc->sc_rx_ino, INTR_ENABLED);
INTR_ENABLED);
INTR_ENABLED);
INTR_ENABLED);
INTR_ENABLED);
cbus_intr_setenabled(sc->sc_bustag, sc->sc_tx_ino, INTR_ENABLED);
cbus_intr_setenabled(sc->sc_bustag, sc->sc_rx_ino, INTR_ENABLED);
err = sun4v_intr_setenabled(devhandle, sysino, INTR_ENABLED);