INTEL_INFO
max_pat_index = INTEL_INFO(i915)->max_pat_index;
cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment;
return INTEL_INFO(i915)->cachelevel_to_pat[level];
if (INTEL_INFO(dev_priv)->dma_mask_size == 36)
(((IS_IVYBRIDGE(i915) && INTEL_INFO(i915)->gt == 1) ||
switch (INTEL_INFO(i915)->gt) {
switch (INTEL_INFO(i915)->gt) {
gt->info.engine_mask = INTEL_INFO(i915)->platform_engine_mask;
for (i = 1, gtdef = &INTEL_INFO(i915)->extra_gt_list[i - 1];
i++, gtdef = &INTEL_INFO(i915)->extra_gt_list[i - 1]) {
INTEL_INFO(i915)->gt == 3 ?
if (INTEL_INFO(gt->i915)->has_coherent_ggtt)
gt->info.engine_mask = INTEL_INFO(i915)->platform_engine_mask;
for (i = 1, gtdef = &INTEL_INFO(i915)->extra_gt_list[i - 1];
i++, gtdef = &INTEL_INFO(i915)->extra_gt_list[i - 1]) {
MISSING_CASE(INTEL_INFO(i915)->platform);
#define HAS_MSLICE_STEERING(i915) (INTEL_INFO(i915)->has_mslice_steering)
return INTEL_INFO(i915)->gpu_reset_clobbers_display;
return INTEL_INFO(gt->i915)->has_reset_engine;
if (INTEL_INFO(i915)->is_mobile)
switch (INTEL_INFO(i915)->gt) {
MISSING_CASE(INTEL_INFO(i915)->gt);
if (INTEL_INFO(i915)->gt == 1)
if (INTEL_INFO(i915)->tuning_thread_rr_after_dep)
(INTEL_INFO(i915)->gt == 3 ? HDC_FENCE_DEST_SLM_DISABLE : 0));
enum intel_platform platform = INTEL_INFO(engine->i915)->platform;
mask = INTEL_INFO(gt->i915)->platform_engine_mask;
mask = INTEL_INFO(gt->i915)->platform_engine_mask;
enum intel_platform p = INTEL_INFO(i915)->platform;
intel_device_info_print(INTEL_INFO(i915), RUNTIME_INFO(i915), &p);
intel_platform_name(INTEL_INFO(dev_priv)->platform),
unsigned int mask_size = INTEL_INFO(i915)->dma_mask_size;
intel_platform_name(INTEL_INFO(dev_priv)->platform),
INTEL_INFO(dev_priv)->platform),
intel_device_info_print(INTEL_INFO(dev_priv),
#define IS_MOBILE(i915) (INTEL_INFO(i915)->is_mobile)
#define IS_DGFX(i915) (INTEL_INFO(i915)->is_dgfx)
#define HAS_MEDIA_RATIO_MODE(i915) (INTEL_INFO(i915)->has_media_ratio_mode)
#define HAS_LLC(i915) (INTEL_INFO(i915)->has_llc)
#define HAS_SNOOP(i915) (INTEL_INFO(i915)->has_snoop)
#define HWS_NEEDS_PHYSICAL(i915) (INTEL_INFO(i915)->hws_needs_physical)
(INTEL_INFO(i915)->has_logical_ring_contexts)
(INTEL_INFO(i915)->has_logical_ring_elsq)
(IS_SKYLAKE(i915) && (INTEL_INFO(i915)->gt == 3 || INTEL_INFO(i915)->gt == 4))
#define HAS_RC6(i915) (INTEL_INFO(i915)->has_rc6)
#define HAS_RC6p(i915) (INTEL_INFO(i915)->has_rc6p)
#define HAS_RPS(i915) (INTEL_INFO(i915)->has_rps)
(IS_ENABLED(CONFIG_DRM_I915_PXP) && INTEL_INFO(i915)->has_pxp)
(INTEL_INFO(i915)->has_heci_pxp)
(INTEL_INFO(i915)->has_heci_gscfi)
#define HAS_RUNTIME_PM(i915) (INTEL_INFO(i915)->has_runtime_pm)
#define HAS_64BIT_RELOC(i915) (INTEL_INFO(i915)->has_64bit_reloc)
(INTEL_INFO(i915)->has_oa_bpc_reporting)
(INTEL_INFO(i915)->has_oa_slice_contrib_limits)
(INTEL_INFO(i915)->has_oam)
#define HAS_64K_PAGES(i915) (INTEL_INFO(i915)->has_64k_pages)
#define HAS_REGION(i915, id) (INTEL_INFO(i915)->memory_regions & BIT(id))
#define HAS_EXTRA_GT_LIST(i915) (INTEL_INFO(i915)->extra_gt_list)
#define HAS_FLAT_CCS(i915) (INTEL_INFO(i915)->has_flat_ccs)
#define HAS_GT_UC(i915) (INTEL_INFO(i915)->has_gt_uc)
#define HAS_GLOBAL_MOCS_REGISTERS(i915) (INTEL_INFO(i915)->has_global_mocs)
#define HAS_GMD_ID(i915) (INTEL_INFO(i915)->has_gmd_id)
#define HAS_L3_CCS_READ(i915) (INTEL_INFO(i915)->has_l3_ccs_read)
#define HAS_L3_DPF(i915) (INTEL_INFO(i915)->has_l3_dpf)
#define NUM_L3_SLICES(i915) (IS_HASWELL(i915) && INTEL_INFO(i915)->gt == 3 ? \
(INTEL_INFO(i915)->has_guc_deprivilege)
#define HAS_GUC_TLB_INVALIDATION(i915) (INTEL_INFO(i915)->has_guc_tlb_invalidation)
#define HAS_3D_PIPELINE(i915) (INTEL_INFO(i915)->has_3d_pipeline)
#define HAS_ONE_EU_PER_FUSE_BIT(i915) (INTEL_INFO(i915)->has_one_eu_per_fuse_bit)
value = INTEL_INFO(i915)->has_coherent_ggtt;
INTEL_INFO(i915),
if (INTEL_INFO(i915)->has_gt_uc) {
enum intel_platform platform = INTEL_INFO(i915)->platform;
if (INTEL_INFO(i915)->gt == 1)
const struct intel_device_info *info = INTEL_INFO(i915);
INTEL_INFO(i915)->platform == INTEL_METEORLAKE) {
memcpy(runtime, &INTEL_INFO(i915)->__runtime, sizeof(*runtime));
intel_platform_name(INTEL_INFO(gt->i915)->platform));