ICL_DPCLKA_CFGCR0
tmp = intel_de_read(display, ICL_DPCLKA_CFGCR0);
intel_de_write(display, ICL_DPCLKA_CFGCR0, tmp);
tmp = intel_de_read(display, ICL_DPCLKA_CFGCR0);
intel_de_write(display, ICL_DPCLKA_CFGCR0, tmp);
tmp = intel_de_read(display, ICL_DPCLKA_CFGCR0);
val = intel_de_read(display, ICL_DPCLKA_CFGCR0);
intel_de_write(display, ICL_DPCLKA_CFGCR0, val);
intel_de_write(display, ICL_DPCLKA_CFGCR0, val);
intel_de_posting_read(display, ICL_DPCLKA_CFGCR0);
_icl_ddi_enable_clock(display, ICL_DPCLKA_CFGCR0,
_icl_ddi_disable_clock(display, ICL_DPCLKA_CFGCR0,
return _icl_ddi_is_clock_enabled(display, ICL_DPCLKA_CFGCR0,
return _icl_ddi_get_pll(display, ICL_DPCLKA_CFGCR0,
_icl_ddi_enable_clock(display, ICL_DPCLKA_CFGCR0,
_icl_ddi_disable_clock(display, ICL_DPCLKA_CFGCR0,
return _icl_ddi_is_clock_enabled(display, ICL_DPCLKA_CFGCR0,
return _icl_ddi_get_pll(display, ICL_DPCLKA_CFGCR0,
intel_de_rmw(display, ICL_DPCLKA_CFGCR0,
intel_de_rmw(display, ICL_DPCLKA_CFGCR0,
tmp = intel_de_read(display, ICL_DPCLKA_CFGCR0);