Symbol: APMU_EMAC1_CLK_RST_CTRL
sys/arch/riscv64/dev/smtclock.c
350
{ K1_CLK_EMAC1_BUS, APMU_EMAC1_CLK_RST_CTRL, 0 },
sys/arch/riscv64/dev/smtclock.c
371
{ K1_RESET_EMAC1, APMU_EMAC1_CLK_RST_CTRL, -1, 1 },
sys/arch/riscv64/dev/smtclock.c
444
{ K3_CLK_EMAC1_BUS, APMU_EMAC1_CLK_RST_CTRL, 0 },
sys/arch/riscv64/dev/smtclock.c
445
{ K3_CLK_EMAC1_RGMII_TX, APMU_EMAC1_CLK_RST_CTRL, 8 },
sys/arch/riscv64/dev/smtclock.c
471
{ K3_RESET_EMAC1, APMU_EMAC1_CLK_RST_CTRL, -1, 1 },