sys/arch/riscv64/dev/smtclock.c

303

{ K1_CLK_TWSI8, APBC_TWSI8_CLK_RST, 1 },

sys/arch/riscv64/dev/smtclock.c

312

{ K1_CLK_TWSI8_BUS, APBC_TWSI8_CLK_RST, 0 },

sys/arch/riscv64/dev/smtclock.c

334

{ K1_RESET_TWSI8, APBC_TWSI8_CLK_RST, 2, -1 },

sys/arch/riscv64/dev/smtclock.c

392

{ K3_CLK_TWSI8, APBC_TWSI8_CLK_RST, 1 },

sys/arch/riscv64/dev/smtclock.c

399

{ K3_CLK_TWSI8_BUS, APBC_TWSI8_CLK_RST, 0 },

sys/arch/riscv64/dev/smtclock.c

422

{ K3_RESET_TWSI8, APBC_TWSI8_CLK_RST, 2, -1 },

sys/arch/riscv64/dev/smtclock.c

711

HWRITE4(sc, APBC_TWSI8_CLK_RST,

sys/arch/riscv64/dev/smtclock.c

755

HWRITE4(sc, APBC_TWSI8_CLK_RST,

sys/arch/riscv64/dev/smtclock.c

758

HWRITE4(sc, APBC_TWSI8_CLK_RST,