Symbol: APBC_TWSI5_CLK_RST
sys/arch/riscv64/dev/smtclock.c
300
{ K1_CLK_TWSI5, APBC_TWSI5_CLK_RST, 1 },
sys/arch/riscv64/dev/smtclock.c
309
{ K1_CLK_TWSI5_BUS, APBC_TWSI5_CLK_RST, 0 },
sys/arch/riscv64/dev/smtclock.c
331
{ K1_RESET_TWSI5, APBC_TWSI5_CLK_RST, 2, -1 },
sys/arch/riscv64/dev/smtclock.c
390
{ K3_CLK_TWSI5, APBC_TWSI5_CLK_RST, 1 },
sys/arch/riscv64/dev/smtclock.c
397
{ K3_CLK_TWSI5_BUS, APBC_TWSI5_CLK_RST, 0 },
sys/arch/riscv64/dev/smtclock.c
420
{ K3_RESET_TWSI5, APBC_TWSI5_CLK_RST, 2, -1 },