Symbol: APBC_TWSI0_CLK_RST
sys/arch/riscv64/dev/smtclock.c
296
{ K1_CLK_TWSI0, APBC_TWSI0_CLK_RST, 1 },
sys/arch/riscv64/dev/smtclock.c
305
{ K1_CLK_TWSI0_BUS, APBC_TWSI0_CLK_RST, 0 },
sys/arch/riscv64/dev/smtclock.c
327
{ K1_RESET_TWSI0, APBC_TWSI0_CLK_RST, 2, -1 },
sys/arch/riscv64/dev/smtclock.c
386
{ K3_CLK_TWSI0, APBC_TWSI0_CLK_RST, 1 },
sys/arch/riscv64/dev/smtclock.c
393
{ K3_CLK_TWSI0_BUS, APBC_TWSI0_CLK_RST, 0 },
sys/arch/riscv64/dev/smtclock.c
416
{ K3_RESET_TWSI0, APBC_TWSI0_CLK_RST, 2, -1 },