sys/arch/armv7/omap/ommmc.c

498

HWRITE1(sc, i, sc->regs[i]);

sys/dev/fdt/plgpio.c

150

HWRITE1(sc, GPIODATA(pin), (1 << pin));

sys/dev/fdt/plgpio.c

152

HWRITE1(sc, GPIODATA(pin), 0);

sys/dev/fdt/plgpio.c

39

HWRITE1((sc), (reg), HREAD1((sc), (reg)) | (bits))

sys/dev/fdt/plgpio.c

41

HWRITE1((sc), (reg), HREAD1((sc), (reg)) & ~(bits))

sys/dev/ic/imxiic.c

104

HWRITE1(sc, I2C_I2SR, I2C_I2SR_IIF);

sys/dev/ic/imxiic.c

128

HWRITE1(sc, I2C_IFDR, sc->frequency);

sys/dev/ic/imxiic.c

161

HWRITE1(sc, I2C_I2DR, (addr << 1) | 1);

sys/dev/ic/imxiic.c

201

HWRITE1(sc, I2C_I2DR, addr << 1);

sys/dev/ic/imxiic.c

210

HWRITE1(sc, I2C_I2DR, ((uint8_t*)cmd)[i]);

sys/dev/ic/imxiic.c

219

HWRITE1(sc, I2C_I2DR, ((uint8_t*)data)[i]);

sys/dev/ic/imxiic.c

67

HWRITE1((sc), (reg), HREAD1((sc), (reg)) | (bits))

sys/dev/ic/imxiic.c

69

HWRITE1((sc), (reg), HREAD1((sc), (reg)) & ~(bits))

sys/dev/ic/imxiic.c

83

HWRITE1(sc, I2C_I2SR, I2C_I2SR_IAL | I2C_I2SR_IIF);

sys/dev/ic/imxiic.c

85

HWRITE1(sc, I2C_I2SR, 0);

sys/dev/ic/imxiic.c

91

HWRITE1(sc, I2C_I2CR, I2C_I2CR_IEN);

sys/dev/ic/imxiic.c

93

HWRITE1(sc, I2C_I2CR, 0);

sys/dev/sdmmc/sdhc.c

1211

HWRITE1(hp, SDHC_SOFTWARE_RESET, mask);

sys/dev/sdmmc/sdhc.c

1216

HWRITE1(hp, SDHC_SOFTWARE_RESET, 0);

sys/dev/sdmmc/sdhc.c

1221

HWRITE1(hp, SDHC_SOFTWARE_RESET, 0);

sys/dev/sdmmc/sdhc.c

476

HWRITE1(hp, i, hp->regs[i]);

sys/dev/sdmmc/sdhc.c

535

HWRITE1(hp, SDHC_TIMEOUT_CTL, SDHC_TIMEOUT_MAX);

sys/dev/sdmmc/sdhc.c

596

HWRITE1(hp, SDHC_POWER_CTL, 0);

sys/dev/sdmmc/sdhc.c

631

HWRITE1(hp, SDHC_POWER_CTL, 0);

sys/dev/sdmmc/sdhc.c

637

HWRITE1(hp, SDHC_POWER_CTL, (vdd << SDHC_VOLTAGE_SHIFT) |

sys/dev/sdmmc/sdhc.c

795

HWRITE1(hp, SDHC_HOST_CTL, reg);

sys/dev/sdmmc/sdhc.c

86

HWRITE1((hp), (reg), HREAD1((hp), (reg)) & ~(bits))

sys/dev/sdmmc/sdhc.c

90

HWRITE1((hp), (reg), HREAD1((hp), (reg)) | (bits))