Symbol: HSW_CACHEABILITY_CONTROL
sys/dev/pci/drm/i915/gt/intel_gtt.h
112
#define HSW_WB_LLC_AGE3 HSW_CACHEABILITY_CONTROL(0x2)
sys/dev/pci/drm/i915/gt/intel_gtt.h
113
#define HSW_WB_LLC_AGE0 HSW_CACHEABILITY_CONTROL(0x3)
sys/dev/pci/drm/i915/gt/intel_gtt.h
114
#define HSW_WB_ELLC_LLC_AGE3 HSW_CACHEABILITY_CONTROL(0x8)
sys/dev/pci/drm/i915/gt/intel_gtt.h
115
#define HSW_WB_ELLC_LLC_AGE0 HSW_CACHEABILITY_CONTROL(0xb)
sys/dev/pci/drm/i915/gt/intel_gtt.h
116
#define HSW_WT_ELLC_LLC_AGE3 HSW_CACHEABILITY_CONTROL(0x7)
sys/dev/pci/drm/i915/gt/intel_gtt.h
117
#define HSW_WT_ELLC_LLC_AGE0 HSW_CACHEABILITY_CONTROL(0x6)