sys/dev/mii/atphy.c

381

anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;

sys/dev/mii/brgphy.c

369

PHY_WRITE(sc, MII_ANAR, ANAR_CSMA);

sys/dev/mii/brgphy.c

726

anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;

sys/dev/mii/ciphy.c

197

PHY_WRITE(sc, MII_ANAR, ANAR_CSMA);

sys/dev/mii/ipgphy.c

365

PHY_WRITE(sc, MII_ANAR, reg | ANAR_CSMA);

sys/dev/mii/jmphy.c

350

PHY_WRITE(sc, MII_ANAR, anar | ANAR_CSMA);

sys/dev/mii/mii_physubr.c

152

ANAR_CSMA;

sys/dev/mii/mii_physubr.c

570

rv = ANAR_10|ANAR_CSMA;

sys/dev/mii/mii_physubr.c

573

rv = ANAR_10_FD|ANAR_CSMA;

sys/dev/mii/mii_physubr.c

576

rv = ANAR_TX|ANAR_CSMA;

sys/dev/mii/mii_physubr.c

579

rv = ANAR_TX_FD|ANAR_CSMA;

sys/dev/mii/mii_physubr.c

58

{ BMCR_ISO, ANAR_CSMA, 0 },

sys/dev/mii/mii_physubr.c

582

rv = ANAR_T4|ANAR_CSMA;

sys/dev/mii/mii_physubr.c

60

{ BMCR_S10, ANAR_CSMA|ANAR_10, 0 },

sys/dev/mii/mii_physubr.c

62

{ BMCR_S10|BMCR_FDX, ANAR_CSMA|ANAR_10_FD, 0 },

sys/dev/mii/mii_physubr.c

64

{ BMCR_S100, ANAR_CSMA|ANAR_T4, 0 },

sys/dev/mii/mii_physubr.c

66

{ BMCR_S100, ANAR_CSMA|ANAR_TX, 0 },

sys/dev/mii/mii_physubr.c

68

{ BMCR_S100|BMCR_FDX, ANAR_CSMA|ANAR_TX_FD, 0 },

sys/dev/mii/mii_physubr.c

70

{ BMCR_S1000, ANAR_CSMA, 0 },

sys/dev/mii/mii_physubr.c

72

{ BMCR_S1000|BMCR_FDX, ANAR_CSMA, 0 },

sys/dev/mii/mii_physubr.c

74

{ BMCR_S1000, ANAR_CSMA, GTCR_ADV_1000THDX },

sys/dev/mii/mii_physubr.c

76

{ BMCR_S1000|BMCR_FDX, ANAR_CSMA, GTCR_ADV_1000TFDX },

sys/dev/mii/rgephy.c

415

anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA;

sys/dev/pci/if_jme.c

1024

ANAR_TX_FD | ANAR_TX | ANAR_10_FD | ANAR_10 | ANAR_CSMA);