Symbol: HDMI_GC_SEND
sys/dev/pci/drm/amd/amdgpu/dce_v10_0.c
1629
tmp = REG_SET_FIELD(tmp, HDMI_VBI_PACKET_CONTROL, HDMI_GC_SEND, 1); /* send general control packets */
sys/dev/pci/drm/amd/amdgpu/dce_v6_0.c
1472
tmp = REG_SET_FIELD(tmp, HDMI_VBI_PACKET_CONTROL, HDMI_GC_SEND, 1);
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.c
631
HDMI_GC_SEND, 1,
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
141
SE_SF(HDMI_VBI_PACKET_CONTROL, HDMI_GC_SEND, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
226
SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_SEND, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
410
uint8_t HDMI_GC_SEND;
sys/dev/pci/drm/amd/display/dc/dce/dce_stream_encoder.h
542
uint32_t HDMI_GC_SEND;
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
583
HDMI_GC_SEND, 1,
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
214
SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_SEND, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.h
421
type HDMI_GC_SEND;\
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.c
688
HDMI_GC_SEND, 1,
sys/dev/pci/drm/amd/display/dc/dio/dcn30/dcn30_dio_stream_encoder.h
125
SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_SEND, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.c
253
HDMI_GC_SEND, 1,
sys/dev/pci/drm/amd/display/dc/dio/dcn314/dcn314_dio_stream_encoder.h
124
SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_SEND, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.c
211
HDMI_GC_SEND, 1,
sys/dev/pci/drm/amd/display/dc/dio/dcn32/dcn32_dio_stream_encoder.h
45
SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_SEND, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.c
199
HDMI_GC_SEND, 1,
sys/dev/pci/drm/amd/display/dc/dio/dcn35/dcn35_dio_stream_encoder.h
125
SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_SEND, mask_sh),\
sys/dev/pci/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c
211
HDMI_GC_SEND, 1,
sys/dev/pci/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.h
46
SE_SF(DIG0_HDMI_VBI_PACKET_CONTROL, HDMI_GC_SEND, mask_sh),\
sys/dev/pci/drm/radeon/evergreen_hdmi.c
315
HDMI_GC_SEND | /* send general control packets */