sys/arch/armv7/omap/omgpio.c

454

return omgpio_pin_read(sc, GPIO_PIN_TO_OFFSET(gpio));

sys/arch/armv7/omap/omgpio.c

462

omgpio_pin_write(sc, GPIO_PIN_TO_OFFSET(gpio), GPIO_PIN_HIGH);

sys/arch/armv7/omap/omgpio.c

470

omgpio_pin_write(sc, GPIO_PIN_TO_OFFSET(gpio), GPIO_PIN_LOW);

sys/arch/armv7/omap/omgpio.c

478

omgpio_pin_dir_write(sc, GPIO_PIN_TO_OFFSET(gpio), dir);

sys/arch/armv7/omap/omgpio.c

491

return (reg >> GPIO_PIN_TO_OFFSET(pin)) & 0x1;

sys/arch/armv7/omap/omgpio.c

501

1 << GPIO_PIN_TO_OFFSET(pin));

sys/arch/armv7/omap/omgpio.c

504

1 << GPIO_PIN_TO_OFFSET(pin));

sys/arch/armv7/omap/omgpio.c

533

reg |= 1 << GPIO_PIN_TO_OFFSET(gpio);

sys/arch/armv7/omap/omgpio.c

535

reg &= ~(1 << GPIO_PIN_TO_OFFSET(gpio));

sys/arch/armv7/omap/omgpio.c

546

if (reg & (1 << GPIO_PIN_TO_OFFSET(gpio)))

sys/arch/armv7/omap/omgpio.c

558

WRITE4(sc, sc->sc_regs.irqstatus0, 1 << GPIO_PIN_TO_OFFSET(gpio));

sys/arch/armv7/omap/omgpio.c

566

WRITE4(sc, sc->sc_regs.irqstatus_clear0, 1 << GPIO_PIN_TO_OFFSET(gpio));

sys/arch/armv7/omap/omgpio.c

574

WRITE4(sc, sc->sc_regs.irqstatus_set0, 1 << GPIO_PIN_TO_OFFSET(gpio));

sys/arch/armv7/omap/omgpio.c

591

bit = 1 << GPIO_PIN_TO_OFFSET(gpio);

sys/arch/armv7/omap/omgpio.c

664

if (sc->sc_handlers[GPIO_PIN_TO_OFFSET(gpio)] != NULL)

sys/arch/armv7/omap/omgpio.c

666

gpio, sc->sc_handlers[GPIO_PIN_TO_OFFSET(gpio)]->ih_name,

sys/arch/armv7/omap/omgpio.c

679

sc->sc_handlers[GPIO_PIN_TO_OFFSET(gpio)] = ih;

sys/arch/armv7/omap/omgpio.c

702

ih = sc->sc_handlers[GPIO_PIN_TO_OFFSET(gpio)];

sys/arch/armv7/omap/omgpio.c

703

sc->sc_handlers[GPIO_PIN_TO_OFFSET(gpio)] = NULL;