sys/dev/pci/drm/i915/gt/gen2_engine_cs.c

104

*cs++ = GFX_OP_PIPE_CONTROL(4) | PIPE_CONTROL_QW_WRITE;

sys/dev/pci/drm/i915/gt/gen2_engine_cs.c

114

*cs++ = GFX_OP_PIPE_CONTROL(4) | PIPE_CONTROL_QW_WRITE;

sys/dev/pci/drm/i915/gt/gen6_engine_cs.c

134

*cs++ = GFX_OP_PIPE_CONTROL(4);

sys/dev/pci/drm/i915/gt/gen6_engine_cs.c

146

*cs++ = GFX_OP_PIPE_CONTROL(4);

sys/dev/pci/drm/i915/gt/gen6_engine_cs.c

151

*cs++ = GFX_OP_PIPE_CONTROL(4);

sys/dev/pci/drm/i915/gt/gen6_engine_cs.c

159

*cs++ = GFX_OP_PIPE_CONTROL(4);

sys/dev/pci/drm/i915/gt/gen6_engine_cs.c

280

*cs++ = GFX_OP_PIPE_CONTROL(4);

sys/dev/pci/drm/i915/gt/gen6_engine_cs.c

344

*cs++ = GFX_OP_PIPE_CONTROL(4);

sys/dev/pci/drm/i915/gt/gen6_engine_cs.c

355

*cs++ = GFX_OP_PIPE_CONTROL(4);

sys/dev/pci/drm/i915/gt/gen6_engine_cs.c

66

*cs++ = GFX_OP_PIPE_CONTROL(5);

sys/dev/pci/drm/i915/gt/gen6_engine_cs.c

78

*cs++ = GFX_OP_PIPE_CONTROL(5);

sys/dev/pci/drm/i915/gt/gen7_renderclear.c

344

*cs++ = GFX_OP_PIPE_CONTROL(4);

sys/dev/pci/drm/i915/gt/gen7_renderclear.c

360

*cs++ = GFX_OP_PIPE_CONTROL(5);

sys/dev/pci/drm/i915/gt/gen7_renderclear.c

367

*cs++ = GFX_OP_PIPE_CONTROL(5);

sys/dev/pci/drm/i915/gt/gen8_engine_cs.h

58

batch[0] = GFX_OP_PIPE_CONTROL(6) | bit_group_0;

sys/dev/pci/drm/i915/gt/gen8_engine_cs.h

81

*cs++ = GFX_OP_PIPE_CONTROL(6) | flags0;

sys/dev/pci/drm/i915/i915_cmd_parser.c

297

CMD( GFX_OP_PIPE_CONTROL(5), S3D, !F, 0xFF, B,

sys/dev/pci/drm/i915/selftests/i915_perf.c

174

*cs++ = GFX_OP_PIPE_CONTROL(len);