sys/dev/pci/drm/i915/gvt/mmio_context.c

164

u32 control_table[I915_NUM_ENGINES][GEN9_MOCS_SIZE];

sys/dev/pci/drm/i915/gvt/mmio_context.c

165

u32 l3cc_table[GEN9_MOCS_SIZE / 2];

sys/dev/pci/drm/i915/gvt/mmio_context.c

194

for (i = 0; i < GEN9_MOCS_SIZE; i++) {

sys/dev/pci/drm/i915/gvt/mmio_context.c

202

for (i = 0; i < GEN9_MOCS_SIZE / 2; i++) {

sys/dev/pci/drm/i915/gvt/mmio_context.c

261

cs = intel_ring_begin(req, 2 * GEN9_MOCS_SIZE + 2);

sys/dev/pci/drm/i915/gvt/mmio_context.c

265

*cs++ = MI_LOAD_REGISTER_IMM(GEN9_MOCS_SIZE);

sys/dev/pci/drm/i915/gvt/mmio_context.c

267

for (index = 0; index < GEN9_MOCS_SIZE; index++) {

sys/dev/pci/drm/i915/gvt/mmio_context.c

288

cs = intel_ring_begin(req, 2 * GEN9_MOCS_SIZE / 2 + 2);

sys/dev/pci/drm/i915/gvt/mmio_context.c

292

*cs++ = MI_LOAD_REGISTER_IMM(GEN9_MOCS_SIZE / 2);

sys/dev/pci/drm/i915/gvt/mmio_context.c

294

for (index = 0; index < GEN9_MOCS_SIZE / 2; index++) {

sys/dev/pci/drm/i915/gvt/mmio_context.c

434

for (i = 0; i < GEN9_MOCS_SIZE; i++) {

sys/dev/pci/drm/i915/gvt/mmio_context.c

452

for (i = 0; i < GEN9_MOCS_SIZE / 2; i++) {