sys/dev/pci/drm/i915/display/intel_ddi.c

4834

return intel_de_read(display, GEN8_DE_PORT_ISR) & bit;

sys/dev/pci/drm/i915/gvt/display.c

196

vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &=

sys/dev/pci/drm/i915/gvt/display.c

244

vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &= ~BXT_DE_PORT_HOTPLUG_MASK;

sys/dev/pci/drm/i915/gvt/display.c

304

vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=

sys/dev/pci/drm/i915/gvt/display.c

335

vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=

sys/dev/pci/drm/i915/gvt/display.c

366

vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=

sys/dev/pci/drm/i915/gvt/display.c

504

vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=

sys/dev/pci/drm/i915/gvt/display.c

711

vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=

sys/dev/pci/drm/i915/gvt/display.c

714

vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &=

sys/dev/pci/drm/i915/gvt/display.c

727

vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=

sys/dev/pci/drm/i915/gvt/display.c

732

vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &=

sys/dev/pci/drm/i915/gvt/display.c

747

vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) |=

sys/dev/pci/drm/i915/gvt/display.c

752

vgpu_vreg_t(vgpu, GEN8_DE_PORT_ISR) &=

sys/dev/pci/drm/i915/gvt/interrupt.c

511

DEFINE_GVT_GEN8_INTEL_GVT_IRQ_INFO(de_port, GEN8_DE_PORT_ISR);

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

776

MMIO_D(GEN8_DE_PORT_ISR);