sys/dev/pci/drm/amd/amdgpu/amdgpu_vcn.c

200

bo_size = AMDGPU_VCN_STACK_SIZE + AMDGPU_VCN_CONTEXT_SIZE;

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

394

WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);

sys/dev/pci/drm/amd/amdgpu/vcn_v1_0.c

469

WREG32_SOC15_DPG_MODE_1_0(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE,

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

2050

AMDGPU_VCN_CONTEXT_SIZE);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

424

WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_0.c

516

UVD, 0, mmUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

1499

AMDGPU_VCN_CONTEXT_SIZE);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

638

WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);

sys/dev/pci/drm/amd/amdgpu/vcn_v2_5.c

729

VCN, 0, mmUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

1492

AMDGPU_VCN_CONTEXT_SIZE);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

560

WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);

sys/dev/pci/drm/amd/amdgpu/vcn_v3_0.c

651

VCN, inst_idx, mmUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

1447

AMDGPU_VCN_CONTEXT_SIZE);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

489

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0.c

590

VCN, inst_idx, regUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1095

regUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

505

AMDGPU_VCN_CONTEXT_SIZE);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

614

VCN, 0, regUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

440

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_5.c

547

VCN, inst_idx, regUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

404

WREG32_SOC15(VCN, inst, regUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_0.c

506

VCN, inst_idx, regUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

464

WREG32_SOC15(VCN, vcn_inst, regUVD_VCPU_CACHE_SIZE2, AMDGPU_VCN_CONTEXT_SIZE);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

570

VCN, 0, regUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE, 0, indirect);

sys/dev/pci/drm/amd/amdgpu/vcn_v5_0_1.c

887

regUVD_VCPU_CACHE_SIZE2), AMDGPU_VCN_CONTEXT_SIZE);