sys/dev/pci/drm/amd/amdgpu/amdgpu_uvd.c

317

bo_size = AMDGPU_UVD_STACK_SIZE + AMDGPU_UVD_HEAP_SIZE

sys/dev/pci/drm/amd/amdgpu/uvd_v3_1.c

256

size = AMDGPU_UVD_HEAP_SIZE >> 3;

sys/dev/pci/drm/amd/amdgpu/uvd_v4_2.c

591

size = AMDGPU_UVD_HEAP_SIZE >> 3;

sys/dev/pci/drm/amd/amdgpu/uvd_v5_0.c

297

size = AMDGPU_UVD_HEAP_SIZE;

sys/dev/pci/drm/amd/amdgpu/uvd_v6_0.c

623

size = AMDGPU_UVD_HEAP_SIZE;

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

711

WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE1, AMDGPU_UVD_HEAP_SIZE);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

714

lower_32_bits(adev->uvd.inst[i].gpu_addr + offset + AMDGPU_UVD_HEAP_SIZE));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

716

upper_32_bits(adev->uvd.inst[i].gpu_addr + offset + AMDGPU_UVD_HEAP_SIZE));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

854

MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_VCPU_CACHE_SIZE1), AMDGPU_UVD_HEAP_SIZE);

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

857

lower_32_bits(adev->uvd.inst[i].gpu_addr + offset + AMDGPU_UVD_HEAP_SIZE));

sys/dev/pci/drm/amd/amdgpu/uvd_v7_0.c

859

upper_32_bits(adev->uvd.inst[i].gpu_addr + offset + AMDGPU_UVD_HEAP_SIZE));