sys/arch/arm64/arm64/disasm.c

3950

{ 0x7f200000, 0x2a200000, FMT_SF_SHIFT_RM_IMM6_RN_RD, op_orn },

sys/arch/arm64/arm64/disasm.c

3951

{ 0x7f200000, 0x2a000000, FMT_SF_SHIFT_RM_IMM6_RN_RD, op_orr_reg },

sys/arch/arm64/arm64/disasm.c

3952

{ 0x7f200000, 0x4b000000, FMT_SF_SHIFT_RM_IMM6_RN_RD, op_sub_shiftreg },

sys/arch/arm64/arm64/disasm.c

3953

{ 0x7f200000, 0x6b000000, FMT_SF_SHIFT_RM_IMM6_RN_RD, op_subs_shiftreg },

sys/arch/arm64/arm64/disasm.c

3954

{ 0x7f200000, 0x0b000000, FMT_SF_SHIFT_RM_IMM6_RN_RD, op_add_shiftreg },

sys/arch/arm64/arm64/disasm.c

3955

{ 0x7f200000, 0x2b000000, FMT_SF_SHIFT_RM_IMM6_RN_RD, op_adds_shiftreg },

sys/arch/arm64/arm64/disasm.c

3956

{ 0x7f200000, 0x0a000000, FMT_SF_SHIFT_RM_IMM6_RN_RD, op_and_shiftreg },

sys/arch/arm64/arm64/disasm.c

3957

{ 0x7f200000, 0x6a000000, FMT_SF_SHIFT_RM_IMM6_RN_RD, op_ands_shiftreg },

sys/arch/arm64/arm64/disasm.c

3958

{ 0x7f200000, 0x0a200000, FMT_SF_SHIFT_RM_IMM6_RN_RD, op_bic_shiftreg },

sys/arch/arm64/arm64/disasm.c

3959

{ 0x7f200000, 0x6a200000, FMT_SF_SHIFT_RM_IMM6_RN_RD, op_bics_shiftreg },

sys/arch/arm64/arm64/disasm.c

3960

{ 0x7f200000, 0x4a200000, FMT_SF_SHIFT_RM_IMM6_RN_RD, op_eon_shiftreg },

sys/arch/arm64/arm64/disasm.c

3961

{ 0x7f200000, 0x4a000000, FMT_SF_SHIFT_RM_IMM6_RN_RD, op_eor_shiftreg },