sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4263

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regRLC_CE_ERR_STATUS_LOW, regRLC_CE_ERR_STATUS_HIGH),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4266

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regCPC_CE_ERR_STATUS_LO, regCPC_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4269

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regCPF_CE_ERR_STATUS_LO, regCPF_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4272

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regCPG_CE_ERR_STATUS_LO, regCPG_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4275

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regGDS_CE_ERR_STATUS_LO, regGDS_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4278

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regGC_CANE_CE_ERR_STATUS_LO, regGC_CANE_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4281

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSPI_CE_ERR_STATUS_LO, regSPI_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4284

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSP0_CE_ERR_STATUS_LO, regSP0_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4287

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSP1_CE_ERR_STATUS_LO, regSP1_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4290

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSQ_CE_ERR_STATUS_LO, regSQ_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4293

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSQC_CE_EDC_LO, regSQC_CE_EDC_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4296

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCX_CE_ERR_STATUS_LO, regTCX_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4299

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCC_CE_ERR_STATUS_LO, regTCC_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4302

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTA_CE_EDC_LO, regTA_CE_EDC_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4305

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCI_CE_EDC_LO_REG, regTCI_CE_EDC_HI_REG),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4308

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCP_CE_EDC_LO_REG, regTCP_CE_EDC_HI_REG),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4311

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTD_CE_EDC_LO, regTD_CE_EDC_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4314

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regGCEA_CE_ERR_STATUS_LO, regGCEA_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4317

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regLDS_CE_ERR_STATUS_LO, regLDS_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4323

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regRLC_UE_ERR_STATUS_LOW, regRLC_UE_ERR_STATUS_HIGH),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4326

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regCPC_UE_ERR_STATUS_LO, regCPC_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4329

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regCPF_UE_ERR_STATUS_LO, regCPF_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4332

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regCPG_UE_ERR_STATUS_LO, regCPG_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4335

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regGDS_UE_ERR_STATUS_LO, regGDS_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4338

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regGC_CANE_UE_ERR_STATUS_LO, regGC_CANE_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4341

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSPI_UE_ERR_STATUS_LO, regSPI_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4344

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSP0_UE_ERR_STATUS_LO, regSP0_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4347

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSP1_UE_ERR_STATUS_LO, regSP1_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4350

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSQ_UE_ERR_STATUS_LO, regSQ_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4353

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regSQC_UE_EDC_LO, regSQC_UE_EDC_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4356

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCX_UE_ERR_STATUS_LO, regTCX_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4359

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCC_UE_ERR_STATUS_LO, regTCC_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4362

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTA_UE_EDC_LO, regTA_UE_EDC_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4365

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCI_UE_EDC_LO_REG, regTCI_UE_EDC_HI_REG),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4368

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCP_UE_EDC_LO_REG, regTCP_UE_EDC_HI_REG),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4371

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTD_UE_EDC_LO, regTD_UE_EDC_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4374

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regTCA_UE_ERR_STATUS_LO, regTCA_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4377

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regGCEA_UE_ERR_STATUS_LO, regGCEA_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/gfx_v9_4_3.c

4380

{{AMDGPU_RAS_REG_ENTRY(GC, 0, regLDS_UE_ERR_STATUS_LO, regLDS_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1254

{AMDGPU_RAS_REG_ENTRY(JPEG, 0, regVCN_UE_ERR_STATUS_LO_JPEG0S, regVCN_UE_ERR_STATUS_HI_JPEG0S),

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1256

{AMDGPU_RAS_REG_ENTRY(JPEG, 0, regVCN_UE_ERR_STATUS_LO_JPEG0D, regVCN_UE_ERR_STATUS_HI_JPEG0D),

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1258

{AMDGPU_RAS_REG_ENTRY(JPEG, 0, regVCN_UE_ERR_STATUS_LO_JPEG1S, regVCN_UE_ERR_STATUS_HI_JPEG1S),

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1260

{AMDGPU_RAS_REG_ENTRY(JPEG, 0, regVCN_UE_ERR_STATUS_LO_JPEG1D, regVCN_UE_ERR_STATUS_HI_JPEG1D),

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1262

{AMDGPU_RAS_REG_ENTRY(JPEG, 0, regVCN_UE_ERR_STATUS_LO_JPEG2S, regVCN_UE_ERR_STATUS_HI_JPEG2S),

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1264

{AMDGPU_RAS_REG_ENTRY(JPEG, 0, regVCN_UE_ERR_STATUS_LO_JPEG2D, regVCN_UE_ERR_STATUS_HI_JPEG2D),

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1266

{AMDGPU_RAS_REG_ENTRY(JPEG, 0, regVCN_UE_ERR_STATUS_LO_JPEG3S, regVCN_UE_ERR_STATUS_HI_JPEG3S),

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1268

{AMDGPU_RAS_REG_ENTRY(JPEG, 0, regVCN_UE_ERR_STATUS_LO_JPEG3D, regVCN_UE_ERR_STATUS_HI_JPEG3D),

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1270

{AMDGPU_RAS_REG_ENTRY(JPEG, 0, regVCN_UE_ERR_STATUS_LO_JPEG4S, regVCN_UE_ERR_STATUS_HI_JPEG4S),

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1272

{AMDGPU_RAS_REG_ENTRY(JPEG, 0, regVCN_UE_ERR_STATUS_LO_JPEG4D, regVCN_UE_ERR_STATUS_HI_JPEG4D),

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1274

{AMDGPU_RAS_REG_ENTRY(JPEG, 0, regVCN_UE_ERR_STATUS_LO_JPEG5S, regVCN_UE_ERR_STATUS_HI_JPEG5S),

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1276

{AMDGPU_RAS_REG_ENTRY(JPEG, 0, regVCN_UE_ERR_STATUS_LO_JPEG5D, regVCN_UE_ERR_STATUS_HI_JPEG5D),

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1278

{AMDGPU_RAS_REG_ENTRY(JPEG, 0, regVCN_UE_ERR_STATUS_LO_JPEG6S, regVCN_UE_ERR_STATUS_HI_JPEG6S),

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1280

{AMDGPU_RAS_REG_ENTRY(JPEG, 0, regVCN_UE_ERR_STATUS_LO_JPEG6D, regVCN_UE_ERR_STATUS_HI_JPEG6D),

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1282

{AMDGPU_RAS_REG_ENTRY(JPEG, 0, regVCN_UE_ERR_STATUS_LO_JPEG7S, regVCN_UE_ERR_STATUS_HI_JPEG7S),

sys/dev/pci/drm/amd/amdgpu/jpeg_v4_0_3.c

1284

{AMDGPU_RAS_REG_ENTRY(JPEG, 0, regVCN_UE_ERR_STATUS_LO_JPEG7D, regVCN_UE_ERR_STATUS_HI_JPEG7D),

sys/dev/pci/drm/amd/amdgpu/mmhub_v1_8.c

640

{AMDGPU_RAS_REG_ENTRY(MMHUB, 0, regMMEA0_CE_ERR_STATUS_LO, regMMEA0_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/mmhub_v1_8.c

642

{AMDGPU_RAS_REG_ENTRY(MMHUB, 0, regMMEA1_CE_ERR_STATUS_LO, regMMEA1_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/mmhub_v1_8.c

644

{AMDGPU_RAS_REG_ENTRY(MMHUB, 0, regMMEA2_CE_ERR_STATUS_LO, regMMEA2_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/mmhub_v1_8.c

646

{AMDGPU_RAS_REG_ENTRY(MMHUB, 0, regMMEA3_CE_ERR_STATUS_LO, regMMEA3_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/mmhub_v1_8.c

648

{AMDGPU_RAS_REG_ENTRY(MMHUB, 0, regMMEA4_CE_ERR_STATUS_LO, regMMEA4_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/mmhub_v1_8.c

650

{AMDGPU_RAS_REG_ENTRY(MMHUB, 0, regMM_CANE_CE_ERR_STATUS_LO, regMM_CANE_CE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/mmhub_v1_8.c

655

{AMDGPU_RAS_REG_ENTRY(MMHUB, 0, regMMEA0_UE_ERR_STATUS_LO, regMMEA0_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/mmhub_v1_8.c

657

{AMDGPU_RAS_REG_ENTRY(MMHUB, 0, regMMEA1_UE_ERR_STATUS_LO, regMMEA1_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/mmhub_v1_8.c

659

{AMDGPU_RAS_REG_ENTRY(MMHUB, 0, regMMEA2_UE_ERR_STATUS_LO, regMMEA2_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/mmhub_v1_8.c

661

{AMDGPU_RAS_REG_ENTRY(MMHUB, 0, regMMEA3_UE_ERR_STATUS_LO, regMMEA3_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/mmhub_v1_8.c

663

{AMDGPU_RAS_REG_ENTRY(MMHUB, 0, regMMEA4_UE_ERR_STATUS_LO, regMMEA4_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/mmhub_v1_8.c

665

{AMDGPU_RAS_REG_ENTRY(MMHUB, 0, regMM_CANE_UE_ERR_STATUS_LO, regMM_CANE_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/sdma_v4_4_2.c

2427

{AMDGPU_RAS_REG_ENTRY(SDMA0, 0, regSDMA_UE_ERR_STATUS_LO, regSDMA_UE_ERR_STATUS_HI),

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1904

{AMDGPU_RAS_REG_ENTRY(VCN, 0, regVCN_UE_ERR_STATUS_LO_VIDD, regVCN_UE_ERR_STATUS_HI_VIDD),

sys/dev/pci/drm/amd/amdgpu/vcn_v4_0_3.c

1906

{AMDGPU_RAS_REG_ENTRY(VCN, 0, regVCN_UE_ERR_STATUS_LO_VIDV, regVCN_UE_ERR_STATUS_HI_VIDV),