sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.c

3903

adev->ras_hw_enabled &= ~(1 << AMDGPU_RAS_BLOCK__XGMI_WAFL);

sys/dev/pci/drm/amd/amdgpu/amdgpu_ras.h

806

case AMDGPU_RAS_BLOCK__XGMI_WAFL:

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1222

adev->ras_hw_enabled |= BIT(AMDGPU_RAS_BLOCK__XGMI_WAFL);

sys/dev/pci/drm/amd/amdgpu/amdgpu_virt.c

1269

case AMDGPU_RAS_BLOCK__XGMI_WAFL:

sys/dev/pci/drm/amd/amdgpu/amdgpu_xgmi.c

1256

amdgpu_ras_reset_error_count(adev, AMDGPU_RAS_BLOCK__XGMI_WAFL);

sys/dev/pci/drm/amd/amdgpu/amdgpu_xgmi.c

1265

r = amdgpu_ras_bind_aca(adev, AMDGPU_RAS_BLOCK__XGMI_WAFL,

sys/dev/pci/drm/amd/amdgpu/amdgpu_xgmi.c

1429

if (!amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__XGMI_WAFL))

sys/dev/pci/drm/amd/amdgpu/amdgpu_xgmi.c

1512

amdgpu_ras_reset_error_count(adev, AMDGPU_RAS_BLOCK__XGMI_WAFL);

sys/dev/pci/drm/amd/amdgpu/amdgpu_xgmi.c

1661

ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__XGMI_WAFL;

sys/dev/pci/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

3611

.blkid = AMDGPU_RAS_BLOCK__XGMI_WAFL,