sys/dev/pci/drm/radeon/evergreen.c

1384

if (!(RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[crtc]) & EVERGREEN_CRTC_MASTER_EN))

sys/dev/pci/drm/radeon/evergreen.c

1685

tmp = RREG32(EVERGREEN_CRTC_CONTROL + radeon_crtc->crtc_offset);

sys/dev/pci/drm/radeon/evergreen.c

1687

WREG32(EVERGREEN_CRTC_CONTROL + radeon_crtc->crtc_offset, tmp);

sys/dev/pci/drm/radeon/evergreen.c

1710

tmp = RREG32(EVERGREEN_CRTC_CONTROL + radeon_crtc->crtc_offset);

sys/dev/pci/drm/radeon/evergreen.c

1712

WREG32(EVERGREEN_CRTC_CONTROL + radeon_crtc->crtc_offset, tmp);

sys/dev/pci/drm/radeon/evergreen.c

2678

crtc_enabled = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]) & EVERGREEN_CRTC_MASTER_EN;

sys/dev/pci/drm/radeon/evergreen.c

2691

tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);

sys/dev/pci/drm/radeon/evergreen.c

2696

WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);

sys/dev/pci/drm/radeon/evergreen.c

2720

tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);

sys/dev/pci/drm/radeon/evergreen.c

2722

WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);

sys/dev/pci/drm/radeon/evergreen.c

2826

tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);

sys/dev/pci/drm/radeon/evergreen.c

2829

WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);

sys/dev/pci/drm/radeon/evergreen.c

3803

if (RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]) & EVERGREEN_CRTC_MASTER_EN) {

sys/dev/pci/drm/radeon/radeon_device.c

689

reg = RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET) |

sys/dev/pci/drm/radeon/radeon_device.c

690

RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET);

sys/dev/pci/drm/radeon/radeon_device.c

692

reg |= RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET) |

sys/dev/pci/drm/radeon/radeon_device.c

693

RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET);

sys/dev/pci/drm/radeon/radeon_device.c

696

reg |= RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET) |

sys/dev/pci/drm/radeon/radeon_device.c

697

RREG32(EVERGREEN_CRTC_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET);