EDCA_AC_BE
return (((tid == 0) || (tid == 3)) ? EDCA_AC_BE :
return (((tid == 0) || (tid == 3)) ? EDCA_AC_BE :
sc->mgtqid : EDCA_AC_BE;
ic->ic_edca_ac[EDCA_AC_BE].ac_aifsn);
ic->ic_edca_ac[EDCA_AC_BE].ac_ecwmin);
ic->ic_edca_ac[EDCA_AC_BE].ac_ecwmax);
ic->ic_edca_ac[EDCA_AC_BE].ac_txoplimit);
case EDCA_AC_BE:
[EDCA_AC_BE] = { 5, 10, 3, 0 },
[EDCA_AC_BE] = { 4, 10, 3, 0 },
iwm_ac_to_tx_fifo[EDCA_AC_BE], 0, IWM_MAX_TID_COUNT, 0);
int ac = EDCA_AC_BE; /* XXX */
EDCA_AC_BE,
EDCA_AC_BE,
ac = EDCA_AC_BE;
EDCA_AC_BE,
EDCA_AC_BE,
ac = EDCA_AC_BE;
if (qid != usc->ep_data[EDCA_AC_BE] &&
qid = EDCA_AC_BE;
AR_PIPE_TX_DATA, AR_PIPE_RX_DATA, &usc->ep_data[EDCA_AC_BE]);
ic->ic_edca_ac[EDCA_AC_BE].ac_aifsn);
ic->ic_edca_ac[EDCA_AC_BE].ac_ecwmin);
ic->ic_edca_ac[EDCA_AC_BE].ac_ecwmax);
ic->ic_edca_ac[EDCA_AC_BE].ac_txoplimit);
qid = EDCA_AC_BE;
qid = EDCA_AC_BE;
EXP2(edca[EDCA_AC_BE].ac_ecwmax) << 16 |
EXP2(edca[EDCA_AC_BE].ac_ecwmin));
AIFS(edca[EDCA_AC_BE].ac_aifsn));
edca[EDCA_AC_BE].ac_txoplimit);
ic->ic_edca_ac[EDCA_AC_BE].ac_aifsn);
ic->ic_edca_ac[EDCA_AC_BE].ac_ecwmin);
ic->ic_edca_ac[EDCA_AC_BE].ac_ecwmax);
ic->ic_edca_ac[EDCA_AC_BE].ac_txoplimit);
qid = EDCA_AC_BE;
qid = EDCA_AC_BE;
sc->ac2idx[EDCA_AC_BE] = (sc->ntx == 3) ? 2 : ((sc->ntx == 2) ? 1 : 0);
timeout_set(&ni->ni_addba_req_to[EDCA_AC_BE],
ieee80211_node_addba_request(ni, EDCA_AC_BE);
[EDCA_AC_BE] = { 5, 10, 3, 0 },
[EDCA_AC_BE] = { 4, 10, 3, 0 },
[EDCA_AC_BE] = { 4, 10, 3, 0 },
[EDCA_AC_BE] = { 4, 10, 3, 0 },
[EDCA_AC_BE] = { 4, 10, 3, 0 },
[EDCA_AC_BE] = { 4, 10, 3, 0 },
[EDCA_AC_BE] = { 5, 7, 3, 0 },
[EDCA_AC_BE] = { 4, 6, 3, 0 },
[EDCA_AC_BE] = { 4, 6, 3, 0 },
[EDCA_AC_BE] = { 4, 6, 3, 0 },
[EDCA_AC_BE] = { 4, 6, 3, 0 },
[EDCA_AC_BE] = { 4, 6, 3, 0 },
EDCA_AC_BE, /* BE */
EDCA_AC_BE, /* EE */
ac = (up <= 7) ? up_to_ac[up] : EDCA_AC_BE;
case EDCA_AC_BE:
ac = EDCA_AC_BE;
return EDCA_AC_BE;
return edca_to_up[EDCA_AC_BE];
return edca_to_up[EDCA_AC_BE];
return edca_to_up[EDCA_AC_BE];
return edca_to_up[EDCA_AC_BE];