sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1270

DTRACE(" dispclk_mhz (calculated) = %f", mode_lib->vba.DISPCLK_calculated);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1293

DTRACE(" dppclk_mhz[%i] (calculated) = %f", k, mode_lib->vba.DPPCLK_calculated[k]);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1324

DTRACE(" dcfclk_mhz = %f", mode_lib->vba.DCFCLK);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1325

DTRACE(" return_bw_to_dcn = %f", mode_lib->vba.ReturnBandwidthToDCN);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1326

DTRACE(" return_bus_bw = %f", mode_lib->vba.ReturnBW);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1391

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1483

DTRACE(" urgent_extra_latency = %fus", mode_lib->vba.UrgentExtraLatency);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1484

DTRACE(" wm_urgent = %fus", mode_lib->vba.UrgentWatermark);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1501

DTRACE(" wm_wb_urgent = %fus", mode_lib->vba.WritebackUrgentWatermark);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1507

DTRACE(" wm_pstate_change = %fus", mode_lib->vba.DRAMClockChangeWatermark);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1509

DTRACE(" calculating wb pstate watermark");

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1510

DTRACE(" total wb outputs %d", mode_lib->vba.TotalActiveWriteback);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1511

DTRACE(" socclk frequency %f Mhz", mode_lib->vba.SOCCLK);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1524

DTRACE(" wm_wb_pstate %fus", mode_lib->vba.WritebackDRAMClockChangeWatermark);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1685

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1691

DTRACE(" dcfclk_deepsleep_mhz = %fMHz", mode_lib->vba.DCFCLKDeepSleep);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1701

DTRACE(" wm_cstate_exit = %fus", mode_lib->vba.StutterExitWatermark);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20.c

1702

DTRACE(" wm_cstate_enter_exit = %fus", mode_lib->vba.StutterEnterPlusExitWatermark);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1330

DTRACE(" dispclk_mhz (calculated) = %f", mode_lib->vba.DISPCLK_calculated);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1353

DTRACE(" dppclk_mhz[%i] (calculated) = %f", k, mode_lib->vba.DPPCLK_calculated[k]);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1384

DTRACE(" dcfclk_mhz = %f", mode_lib->vba.DCFCLK);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1385

DTRACE(" return_bw_to_dcn = %f", mode_lib->vba.ReturnBandwidthToDCN);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1386

DTRACE(" return_bus_bw = %f", mode_lib->vba.ReturnBW);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1451

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1519

DTRACE(" urgent_extra_latency = %fus", mode_lib->vba.UrgentExtraLatency);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1520

DTRACE(" wm_urgent = %fus", mode_lib->vba.UrgentWatermark);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1537

DTRACE(" wm_wb_urgent = %fus", mode_lib->vba.WritebackUrgentWatermark);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1543

DTRACE(" wm_pstate_change = %fus", mode_lib->vba.DRAMClockChangeWatermark);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1545

DTRACE(" calculating wb pstate watermark");

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1546

DTRACE(" total wb outputs %d", mode_lib->vba.TotalActiveWriteback);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1547

DTRACE(" socclk frequency %f Mhz", mode_lib->vba.SOCCLK);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1560

DTRACE(" wm_wb_pstate %fus", mode_lib->vba.WritebackDRAMClockChangeWatermark);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1721

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1727

DTRACE(" dcfclk_deepsleep_mhz = %fMHz", mode_lib->vba.DCFCLKDeepSleep);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1737

DTRACE(" wm_cstate_exit = %fus", mode_lib->vba.StutterExitWatermark);

sys/dev/pci/drm/amd/display/dc/dml/dcn20/display_mode_vba_20v2.c

1738

DTRACE(" wm_cstate_enter_exit = %fus", mode_lib->vba.StutterEnterPlusExitWatermark);

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

1654

DTRACE(" dispclk_mhz (calculated) = %f", mode_lib->vba.DISPCLK_calculated);

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

1673

DTRACE(" dppclk_mhz[%i] (calculated) = %f", k, mode_lib->vba.DPPCLK_calculated[k]);

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

1677

DTRACE(" dcfclk_mhz = %f", mode_lib->vba.DCFCLK);

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

1678

DTRACE(" return_bw_to_dcn = %f", mode_lib->vba.ReturnBandwidthToDCN);

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

1679

DTRACE(" return_bus_bw = %f", mode_lib->vba.ReturnBW);

sys/dev/pci/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

1739

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

1940

DTRACE(" dispclk_mhz (calculated) = %f", v->DISPCLK_calculated);

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

1959

DTRACE(" dppclk_mhz[%i] (calculated) = %f", k, v->DPPCLK_calculated[k]);

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

1964

DTRACE(" dcfclk_mhz = %f", v->DCFCLK);

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

1965

DTRACE(" return_bus_bw = %f", v->ReturnBW);

sys/dev/pci/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c

2016

DTRACE("read_bw[%i] = %fBps", k, v->ReadBandwidthPlaneLuma[k] + v->ReadBandwidthPlaneChroma[k]);

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

2130

DTRACE(" dispclk_mhz (calculated) = %f", v->DISPCLK_calculated);

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

2139

DTRACE(" dppclk_mhz[%i] (calculated) = %f", k, v->DPPCLK_calculated[k]);

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

2147

DTRACE(" dcfclk_mhz = %f", v->DCFCLK);

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

2148

DTRACE(" return_bus_bw = %f", v->ReturnBW);

sys/dev/pci/drm/amd/display/dc/dml/dcn31/display_mode_vba_31.c

2200

DTRACE(" read_bw[%i] = %fBps", k, v->ReadBandwidthPlaneLuma[k] + v->ReadBandwidthPlaneChroma[k]);

sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

2148

DTRACE(" dispclk_mhz (calculated) = %f", v->DISPCLK_calculated);

sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

2157

DTRACE(" dppclk_mhz[%i] (calculated) = %f", k, v->DPPCLK_calculated[k]);

sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

2165

DTRACE(" dcfclk_mhz = %f", v->DCFCLK);

sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

2166

DTRACE(" return_bus_bw = %f", v->ReturnBW);

sys/dev/pci/drm/amd/display/dc/dml/dcn314/display_mode_vba_314.c

2218

DTRACE(" read_bw[%i] = %fBps", k, v->ReadBandwidthPlaneLuma[k] + v->ReadBandwidthPlaneChroma[k]);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1136

DTRACE("DLG: %s: cstate_en = %d", __func__, cstate_en);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1137

DTRACE("DLG: %s: pstate_en = %d", __func__, pstate_en);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1138

DTRACE("DLG: %s: vm_en = %d", __func__, vm_en);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1139

DTRACE("DLG: %s: iflip_en = %d", __func__, iflip_en);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1144

DTRACE("DLG: %s: dppclk_freq_in_mhz = %3.2f", __func__, dppclk_freq_in_mhz);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1145

DTRACE("DLG: %s: dispclk_freq_in_mhz = %3.2f", __func__, dispclk_freq_in_mhz);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1146

DTRACE("DLG: %s: refclk_freq_in_mhz = %3.2f", __func__, refclk_freq_in_mhz);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1147

DTRACE("DLG: %s: pclk_freq_in_mhz = %3.2f", __func__, pclk_freq_in_mhz);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1148

DTRACE("DLG: %s: interlaced = %d", __func__, interlaced);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

117

DTRACE("DLG: %s: refclk_freq_in_mhz = %3.2f", __func__, refclk_freq_in_mhz);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1178

DTRACE("DLG: %s: min_dcfclk_mhz = %3.2f", __func__, min_dcfclk_mhz);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1179

DTRACE("DLG: %s: min_ttu_vblank = %3.2f", __func__, min_ttu_vblank);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

118

DTRACE("DLG: %s: pclk_freq_in_mhz = %3.2f", __func__, pclk_freq_in_mhz);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1180

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1184

DTRACE("DLG: %s: t_calc_us = %3.2f", __func__, t_calc_us);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1185

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1189

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

119

DTRACE("DLG: %s: recout_width = %d", __func__, recout_width);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

120

DTRACE("DLG: %s: vratio = %3.2f", __func__, vratio);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

121

DTRACE("DLG: %s: req_per_swath_ub = %d", __func__, req_per_swath_ub);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

122

DTRACE("DLG: %s: refcyc_per_delivery= %3.2f", __func__, refcyc_per_delivery);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1257

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1262

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1268

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1294

DTRACE("DLG: %s: htotal = %d", __func__, htotal);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1295

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1299

DTRACE("DLG: %s: dst_x_after_scaler = %d", __func__, dst_x_after_scaler);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1300

DTRACE("DLG: %s: dst_y_after_scaler = %d", __func__, dst_y_after_scaler);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1316

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1320

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1324

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1329

DTRACE("DLG: %s: swath_height_l = %d", __func__, swath_height_l);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1331

DTRACE("DLG: %s: swath_height_c = %d", __func__, swath_height_c);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1333

DTRACE("DLG: %s: line_time_in_us = %3.2f", __func__, (double) line_time_in_us);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1334

DTRACE("DLG: %s: vupdate_offset = %d", __func__, vupdate_offset);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1335

DTRACE("DLG: %s: vupdate_width = %d", __func__, vupdate_width);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1336

DTRACE("DLG: %s: vready_offset = %d", __func__, vready_offset);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1337

DTRACE("DLG: %s: line_time_in_us = %3.2f", __func__, line_time_in_us);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1338

DTRACE("DLG: %s: line_wait = %3.2f", __func__, line_wait);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1339

DTRACE("DLG: %s: line_o = %3.2f", __func__, line_o);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1340

DTRACE("DLG: %s: line_setup = %3.2f", __func__, line_setup);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1341

DTRACE("DLG: %s: line_calc = %3.2f", __func__, line_calc);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1345

DTRACE("DLG: %s: dst_y_prefetch (before rnd) = %3.2f", __func__, dst_y_prefetch);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1349

DTRACE("DLG: %s: dst_y_prefetch (after rnd) = %3.2f", __func__, dst_y_prefetch);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1398

DTRACE("DLG: %s: sw_bytes_ub_l = %d", __func__, sw_bytes_ub_l);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1399

DTRACE("DLG: %s: sw_bytes_ub_c = %d", __func__, sw_bytes_ub_c);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1400

DTRACE("DLG: %s: sw_bytes = %d", __func__, sw_bytes);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1401

DTRACE("DLG: %s: vm_bytes = %d", __func__, vm_bytes);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1402

DTRACE("DLG: %s: meta_row_bytes = %d", __func__, meta_row_bytes);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1403

DTRACE("DLG: %s: dpte_row_bytes = %d", __func__, dpte_row_bytes);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1441

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1445

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1451

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1467

DTRACE("DLG: %s: lsw_l = %d", __func__, lsw_l);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1468

DTRACE("DLG: %s: lsw_c = %d", __func__, lsw_c);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1469

DTRACE("DLG: %s: dpte_bytes_per_row_ub_l = %d", __func__, dpte_bytes_per_row_ub_l);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1470

DTRACE("DLG: %s: dpte_bytes_per_row_ub_c = %d", __func__, dpte_bytes_per_row_ub_c);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1472

DTRACE("DLG: %s: prefetch_bw = %3.2f", __func__, prefetch_bw);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1473

DTRACE("DLG: %s: flip_bw = %3.2f", __func__, flip_bw);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1474

DTRACE("DLG: %s: t_pre_us = %3.2f", __func__, t_pre_us);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1475

DTRACE("DLG: %s: t_vm_us = %3.2f", __func__, t_vm_us);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1476

DTRACE("DLG: %s: t_r0_us = %3.2f", __func__, t_r0_us);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1477

DTRACE("DLG: %s: dst_y_per_vm_vblank = %3.2f", __func__, dst_y_per_vm_vblank);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1478

DTRACE("DLG: %s: dst_y_per_row_vblank = %3.2f", __func__, dst_y_per_row_vblank);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1479

DTRACE("DLG: %s: dst_y_prefetch = %3.2f", __func__, dst_y_prefetch);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

148

DTRACE("DLG: %s: max_num_sw = %0d", __func__, max_num_sw);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

149

DTRACE("DLG: %s: max_partial_sw = %0d", __func__, max_partial_sw);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1495

DTRACE("DLG: %s: lsw = %3.2f", __func__, lsw);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

150

DTRACE("DLG: %s: swath_height = %0d", __func__, swath_height);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

151

DTRACE("DLG: %s: vinit = %3.2f", __func__, vinit);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1514

DTRACE("DLG: %s: vratio_pre_l=%3.2f", __func__, vratio_pre_l);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1515

DTRACE("DLG: %s: vratio_pre_c=%3.2f", __func__, vratio_pre_c);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

152

DTRACE("DLG: %s: vratio_pre = %3.2f", __func__, vratio_pre);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

155

DTRACE("WARNING_DLG: %s: vratio_pre=%3.2f < 1.0, set to 1.0", __func__, vratio_pre);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

160

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1645

DTRACE("DLG: %s: Warningfull_recout_width not set in hsplit mode", __func__);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1672

DTRACE("DLG: %s: full_recout_width = %d", __func__, full_recout_width);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1673

DTRACE("DLG: %s: hscale_pixel_rate_l = %3.2f", __func__, hscale_pixel_rate_l);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1674

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1678

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1713

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1717

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1761

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1765

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1798

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

180

DTRACE("DLG: %s: swath_height = %0d", __func__, swath_height);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1802

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

181

DTRACE("DLG: %s: vinit = %3.2f", __func__, vinit);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1872

DTRACE("DLG: %s: cur0_req_width = %d", __func__, cur0_req_width);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1873

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1877

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1881

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1885

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

1889

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

192

DTRACE("DLG: %s: max_num_sw = %0d", __func__, *max_num_sw);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

193

DTRACE("DLG: %s: max_partial_sw = %0d", __func__, *max_partial_sw);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

211

DTRACE("DLG: %s: rq_sizing param", __func__);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

324

DTRACE("DLG: %s: bug workaround DEGVIDCN10-137", __func__);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

375

DTRACE("DLG: %s: req128_l = %0d", __func__, req128_l);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

376

DTRACE("DLG: %s: req128_c = %0d", __func__, req128_c);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

377

DTRACE("DLG: %s: full_swath_bytes_packed_l = %0d", __func__, full_swath_bytes_packed_l);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

378

DTRACE("DLG: %s: full_swath_bytes_packed_c = %0d", __func__, full_swath_bytes_packed_c);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

664

DTRACE("DLG: %s: surf_linear = %d", __func__, surf_linear);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

665

DTRACE("DLG: %s: surf_vert = %d", __func__, surf_vert);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

666

DTRACE("DLG: %s: blk256_width = %d", __func__, blk256_width);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

667

DTRACE("DLG: %s: blk256_height = %d", __func__, blk256_height);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

774

DTRACE("DLG: %s: meta_blk_height = %d", __func__, meta_blk_height);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

775

DTRACE("DLG: %s: meta_blk_width = %d", __func__, meta_blk_width);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

776

DTRACE("DLG: %s: meta_surface_bytes = %d", __func__, meta_surface_bytes);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

777

DTRACE("DLG: %s: meta_pte_req_per_frame_ub = %d", __func__, meta_pte_req_per_frame_ub);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

778

DTRACE("DLG: %s: meta_pte_bytes_per_frame_ub = %d", __func__, meta_pte_bytes_per_frame_ub);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

943

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

946

DTRACE("MISMATCH: func_meta_row_height = %d", func_meta_row_height);

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

951

DTRACE(

sys/dev/pci/drm/amd/display/dc/dml/dml1_display_rq_dlg_calc.c

954

DTRACE("MISMATCH: func_dpte_row_height = %d", func_dpte_row_height);