sys/dev/pci/drm/i915/display/i9xx_plane.c

1214

base = intel_de_read(display, DSPSURF(display, i9xx_plane)) & DISP_ADDR_MASK;

sys/dev/pci/drm/i915/display/i9xx_plane.c

1222

base = intel_de_read(display, DSPSURF(display, i9xx_plane)) & DISP_ADDR_MASK;

sys/dev/pci/drm/i915/display/i9xx_plane.c

1272

intel_de_write(display, DSPSURF(display, i9xx_plane), plane_state->surf);

sys/dev/pci/drm/i915/display/i9xx_plane.c

519

intel_de_write_fw(display, DSPSURF(display, i9xx_plane), plane_state->surf);

sys/dev/pci/drm/i915/display/i9xx_plane.c

562

intel_de_write_fw(display, DSPSURF(display, i9xx_plane), 0);

sys/dev/pci/drm/i915/display/i9xx_plane.c

575

error->surf = intel_de_read(display, DSPSURF(display, i9xx_plane));

sys/dev/pci/drm/i915/display/i9xx_plane.c

587

error->surf = intel_de_read(display, DSPSURF(display, i9xx_plane));

sys/dev/pci/drm/i915/display/i9xx_plane.c

616

intel_de_write_fw(display, DSPSURF(display, i9xx_plane), plane_state->surf);

sys/dev/pci/drm/i915/display/i9xx_plane.c

919

reg = intel_de_read_fw(display, DSPSURF(display, i9xx_plane));

sys/dev/pci/drm/i915/display/i9xx_plane.c

920

intel_de_write_fw(display, DSPSURF(display, i9xx_plane), reg);

sys/dev/pci/drm/i915/display/intel_fbc.c

410

intel_de_write_fw(display, DSPSURF(display, i9xx_plane),

sys/dev/pci/drm/i915/display/intel_fbc.c

411

intel_de_read_fw(display, DSPSURF(display, i9xx_plane)));

sys/dev/pci/drm/i915/gvt/cmd_parser.c

1322

info->surf_reg = DSPSURF(display, info->pipe);

sys/dev/pci/drm/i915/gvt/cmd_parser.c

1389

info->surf_reg = DSPSURF(display, info->pipe);

sys/dev/pci/drm/i915/gvt/fb_decoder.c

258

plane->base = vgpu_vreg_t(vgpu, DSPSURF(display, pipe)) & I915_GTT_PAGE_MASK;

sys/dev/pci/drm/i915/gvt/handlers.c

1022

calc_index(offset, DSPSURF(display, PIPE_A), DSPSURF(display, PIPE_B), DSPSURF(display, PIPE_C))

sys/dev/pci/drm/i915/gvt/handlers.c

2302

MMIO_DH(DSPSURF(display, PIPE_A), D_ALL, NULL, pri_surf_mmio_write);

sys/dev/pci/drm/i915/gvt/handlers.c

2305

MMIO_DH(DSPSURF(display, PIPE_B), D_ALL, NULL, pri_surf_mmio_write);

sys/dev/pci/drm/i915/gvt/handlers.c

2308

MMIO_DH(DSPSURF(display, PIPE_C), D_ALL, NULL, pri_surf_mmio_write);

sys/dev/pci/drm/i915/intel_clock_gating.c

142

intel_uncore_rmw(&dev_priv->uncore, DSPSURF(display, pipe),

sys/dev/pci/drm/i915/intel_clock_gating.c

145

DSPSURF(display, pipe));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

181

MMIO_D(DSPSURF(display, PIPE_A));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

190

MMIO_D(DSPSURF(display, PIPE_B));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

199

MMIO_D(DSPSURF(display, PIPE_C));