sys/dev/pci/drm/i915/display/i9xx_plane.c

1225

base = intel_de_read(display, DSPADDR(display, i9xx_plane));

sys/dev/pci/drm/i915/display/i9xx_plane.c

1274

intel_de_write(display, DSPADDR(display, i9xx_plane), plane_state->surf);

sys/dev/pci/drm/i915/display/i9xx_plane.c

521

intel_de_write_fw(display, DSPADDR(display, i9xx_plane), plane_state->surf);

sys/dev/pci/drm/i915/display/i9xx_plane.c

564

intel_de_write_fw(display, DSPADDR(display, i9xx_plane), 0);

sys/dev/pci/drm/i915/display/i9xx_plane.c

598

error->surf = intel_de_read(display, DSPADDR(display, i9xx_plane));

sys/dev/pci/drm/i915/display/i9xx_plane.c

923

reg = intel_de_read_fw(display, DSPADDR(display, i9xx_plane));

sys/dev/pci/drm/i915/display/i9xx_plane.c

924

intel_de_write_fw(display, DSPADDR(display, i9xx_plane), reg);

sys/dev/pci/drm/i915/display/intel_fbc.c

372

intel_de_write_fw(display, DSPADDR(display, i9xx_plane),

sys/dev/pci/drm/i915/display/intel_fbc.c

373

intel_de_read_fw(display, DSPADDR(display, i9xx_plane)));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

177

MMIO_D(DSPADDR(display, PIPE_A));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

186

MMIO_D(DSPADDR(display, PIPE_B));

sys/dev/pci/drm/i915/intel_gvt_mmio_table.c

195

MMIO_D(DSPADDR(display, PIPE_C));